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About the Reference Development Kit category
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0
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1736
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2 November 2014
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The Myriad RF and DEO – Nano development project kit installation procedure
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49
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6665
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15 April 2021
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PLL Clock Input - Stand alone mode
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2
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1465
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30 January 2020
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Myriad RF1 TX Test with external PLLCLK
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7
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1561
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30 January 2020
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LMS6002D PLL is not loking
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0
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647
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19 August 2019
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EVB7 board where to buy?
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3
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1269
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2 July 2019
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What is LimeSDR-Mini_factory?
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1
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880
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5 March 2019
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Lime PCIE gateway project don't meet time requirements
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1
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714
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14 February 2019
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SPI Problems, Pyboard
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41
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6158
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29 January 2019
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TX/RX LPF DC offset Calibration on LMS6002D
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8
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4289
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22 December 2018
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uMyriadRF-LMS7002
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7
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3168
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29 October 2018
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MyriadRF-1 Board with external on-board clock generator
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3
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1628
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23 October 2017
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Reference Dev Kit matching network and tuning
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4
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1309
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3 October 2017
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LMS6002 RF loopback and AUXPA settings
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1
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1307
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26 September 2017
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TDD mode
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7
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2055
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29 August 2017
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Digital interface components
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8
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3656
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15 May 2017
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Register test Vtune failed
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0
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1265
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18 April 2017
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LMS6002D MyriadRF Dev Kit Application Note
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0
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1131
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22 March 2017
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TX data format
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1
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1672
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13 March 2017
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Myriad-RF 1 and Zipper - programming SI5351
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0
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1191
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2 March 2017
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LMS6002d TX LO Leakage cancellation
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0
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1480
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24 February 2017
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LMS6002D ADC setting problem
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0
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1149
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8 February 2017
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MyriadRF SPI register readout issue
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3
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1800
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6 February 2017
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Read/Write to Myriad RF via SPI
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1
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1621
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28 January 2017
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Rx Functionality Myriad RF-1 + Zipper
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1
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1503
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28 January 2017
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30,72 clock
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7
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3097
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28 January 2017
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Zipper + Myriad RF Registers Test Failed
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1
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1532
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15 November 2016
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I would like to know the SPI command initialization sequence (Code)
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0
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1289
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18 October 2016
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Myriad-RF Transmit I/Q Balance Calibration
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2
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2225
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13 October 2016
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TX PLL programming (VCO and VCOCAP Code Selection)
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0
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1647
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1 September 2016
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