LMS6002D ADC setting problem


#1

Hello, I have a problem with BB-Loopback Mode test.
I’ve tried to run BB-Loopback using FPGA’s complex sin/cos signals and received signals(ADC out) are not clear.
So, I turned on RXOUTSW(addr: 0x09) and checked the RXOUT signals using oscilloscope.
The RXOUT signals are the same with the FPGA’s output signals.
However ADC out signal is not clear, so I set the several registers related to ADC.
Below is the registers that I changed to control the ADC.

write 0x59 0x00
write 0x5C 0x55
write 0x5B 0x45
write 0x58 0x70

These values are related to bias current(40uA) and ADC Input Buffer En.
If I set these registers as the mentioned values, It looks better but not the same with FPGA’s output.
It looks saturated.

Please let me know how to make the ADC output clear and what the bias and ADC Input Buffer means.

Thanks