System Development


Topic Replies Activity
About the System Development category 1 November 2, 2014
SetLPFBW for RX causes uncertain behaviour 1 August 23, 2019
Relative position of I_A, I_B, Q_A, Q_B in the DIQ2 stream 4 August 23, 2019
Lime6002 tx pll problem 2 August 20, 2019
LimeSDR USB API function return error 3 August 20, 2019
100kHz - 30MHz operation 4 August 20, 2019
Setup and hold times 14 August 17, 2019
limeNET micro + limeSDR with rockPI 4 + AI CORE XM 1 July 31, 2019
LMS8001A Question 3 July 18, 2019
Multiple LMS chips SPI issue 10 July 16, 2019
Lime working with non-pc. What mobo? What OS? 9 July 13, 2019
Running MCU Calibration via LimeSuite 8 July 5, 2019
Producer Support 2 June 13, 2019
IA, IB phase mismatch 7 June 11, 2019
Transmitter Output Level 9 June 11, 2019
Lime Microcontroller Calibration 8 June 5, 2019
Noise in Rx I and Q 9 May 27, 2019
Single Tone Tx 11 May 22, 2019
MIMO DDR mode LML interface 4 May 21, 2019
Clocking architecture for multiple LMS chips 1 May 20, 2019
TxTSG output 17 May 16, 2019
LMS7002 Assembly Guidelines 3 May 14, 2019
Writing a register of LMS7002M 2 May 7, 2019
What is frame, sample source in position x and limelight interface settings? 2 May 2, 2019
How to calibrate IQ imbalance correction in LMS7002m 2 May 2, 2019
LMS6002 - big problem with PLL lock time for FDD and TDD modes 3 April 5, 2019
LMS6002 - What is "ADC sampling phase" parameter means? 3 April 4, 2019
Super frustrated 14 March 26, 2019
DVB-T using limesdr in GNU-Radio with QPSK,16QAM and 64QAM 2 March 18, 2019
Why are the waveforms disappeared in FFT viewer after caculation and tunning? 5 March 9, 2019