Zipper Board + Myriad RF ,Register test faild

Hi All,

i connected Myriad RF “LMS6002” to Zipper board .
i downloaded the source files from this link :

and for the virtual com driver was inside in this link :

and i made all the steps for the compilation of control_LMS6002 software .
But when i connected the RF board to the HSMC connector on Zipper board then connect usb cable from zipper to PC and i run register test --> not all register pass the test few of them failed .

this is want i got from the test
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
addr: 0x04
Testing TxRF SPI, Mask 0xAA:
Module test with this pattern is OK.
Testing TxRF SPI, Mask 0x55:
Module test with this pattern is OK.

addr: 0x07
Testing RxFE SPI, Mask 0xAA:
Module test with this pattern is OK.
Testing RxFE SPI, Mask 0x55:
Module test with this pattern is OK.

addr: 0x06
Testing RxVga2 SPI, Mask 0xAA:
Module test with this pattern is OK.
addr: 0x05
Testing RxVga2 SPI, Mask 0x55:
Module test with this pattern is OK.

Testing RxLPF SPI, Mask 0xAA:
Module test with this pattern is OK.
Testing RxLPF SPI, Mask 0x55:
Reg Addr = 2 Failed (Write/Read Values): 15 / 00
Reg Addr = 3 Failed (Write/Read Values): 15 / 00
Reg Addr = 4 Failed (Write/Read Values): 15 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 55 / 00
Reg Addr = 9 Failed (Write/Read Values): 55 / 00
Reg Addr = 10 Failed (Write/Read Values): 55 / 00
Reg Addr = 11 Failed (Write/Read Values): 55 / 00
Reg Addr = 12 Failed (Write/Read Values): 55 / 00
Reg Addr = 13 Failed (Write/Read Values): 55 / 00
Reg Addr = 14 Failed (Write/Read Values): 55 / 00
Reg Addr = 15 Failed (Write/Read Values): 15 / 00
Module test with this pattern FAILED!

addr: 0x03
Testing TxLPF SPI, Mask 0xAA:
Reg Addr = 2 Failed (Write/Read Values): 2A / 00
Reg Addr = 3 Failed (Write/Read Values): 2A / 00
Reg Addr = 4 Failed (Write/Read Values): 2A / 00
Reg Addr = 5 Failed (Write/Read Values): 2A / 00
Reg Addr = 6 Failed (Write/Read Values): A2 / 00
Reg Addr = 15 Failed (Write/Read Values): 80 / 00
Module test with this pattern FAILED!
Testing TxLPF SPI, Mask 0x55:
Reg Addr = 2 Failed (Write/Read Values): 15 / 00
Reg Addr = 3 Failed (Write/Read Values): 15 / 00
Reg Addr = 4 Failed (Write/Read Values): 15 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Module test with this pattern FAILED!

addr: 0x01
Testing TxPLL SPI, Mask 0xAA:
Reg Addr = 0 Failed (Write/Read Values): AA / 00
Reg Addr = 1 Failed (Write/Read Values): AA / 00
Reg Addr = 2 Failed (Write/Read Values): AA / 00
Reg Addr = 3 Failed (Write/Read Values): AA / 00
Reg Addr = 4 Failed (Write/Read Values): AA / 00
Reg Addr = 5 Failed (Write/Read Values): AA / 00
Reg Addr = 6 Failed (Write/Read Values): AA / 00
Reg Addr = 7 Failed (Write/Read Values): AA / 00
Reg Addr = 8 Failed (Write/Read Values): AA / 00
Reg Addr = 9 Failed (Write/Read Values): AA / 00
Reg Addr = 10 Failed (Write/Read Values): 2A / 00
Reg Addr = 11 Failed (Write/Read Values): AA / 00
Reg Addr = 12 Failed (Write/Read Values): AA / 00
Module test with this pattern FAILED!
Testing TxPLL SPI, Mask 0x55:
Reg Addr = 0 Failed (Write/Read Values): 55 / 00
Reg Addr = 1 Failed (Write/Read Values): 55 / 00
Reg Addr = 2 Failed (Write/Read Values): 55 / 00
Reg Addr = 3 Failed (Write/Read Values): 55 / 00
Reg Addr = 4 Failed (Write/Read Values): 55 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 55 / 00
Reg Addr = 9 Failed (Write/Read Values): 15 / 00
Reg Addr = 10 Failed (Write/Read Values): 15 / 00
Reg Addr = 11 Failed (Write/Read Values): 55 / 00
Reg Addr = 12 Failed (Write/Read Values): 55 / 00
Module test with this pattern FAILED!

addr: 0x02
Testing RxPLL SPI, Mask 0xAA:
Reg Addr = 0 Failed (Write/Read Values): AA / 00
Reg Addr = 1 Failed (Write/Read Values): AA / 00
Reg Addr = 2 Failed (Write/Read Values): AA / 00
Reg Addr = 3 Failed (Write/Read Values): AA / 00
Reg Addr = 4 Failed (Write/Read Values): AA / 00
Reg Addr = 5 Failed (Write/Read Values): AA / 00
Reg Addr = 6 Failed (Write/Read Values): AA / 00
Reg Addr = 7 Failed (Write/Read Values): AA / 00
Reg Addr = 8 Failed (Write/Read Values): AA / 00
Reg Addr = 9 Failed (Write/Read Values): AA / 00
Reg Addr = 10 Failed (Write/Read Values): 2A / 00
Reg Addr = 11 Failed (Write/Read Values): AA / 00
Reg Addr = 12 Failed (Write/Read Values): AA / 00
Module test with this pattern FAILED!
Testing RxPLL SPI, Mask 0x55:
Reg Addr = 0 Failed (Write/Read Values): 55 / 00
Reg Addr = 1 Failed (Write/Read Values): 55 / 00
Reg Addr = 2 Failed (Write/Read Values): 55 / 00
Reg Addr = 3 Failed (Write/Read Values): 55 / 00
Reg Addr = 4 Failed (Write/Read Values): 55 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 55 / 00
Reg Addr = 9 Failed (Write/Read Values): 15 / 00
Reg Addr = 10 Failed (Write/Read Values): 15 / 00
Reg Addr = 11 Failed (Write/Read Values): 55 / 00
Reg Addr = 12 Failed (Write/Read Values): 55 / 00
Module test with this pattern FAILED!

addr: 0x00
Testing Top SPI, Mask 0xAA:
Reg Addr = 2 Failed (Write/Read Values): 2A / 00
Reg Addr = 3 Failed (Write/Read Values): 2A / 00
Reg Addr = 5 Failed (Write/Read Values): AA / 00
Reg Addr = 6 Failed (Write/Read Values): 0A / 00
Reg Addr = 7 Failed (Write/Read Values): AA / 00
Reg Addr = 8 Failed (Write/Read Values): AA / 00
Reg Addr = 9 Failed (Write/Read Values): AA / 00
Reg Addr = 10 Failed (Write/Read Values): 02 / 00
Reg Addr = 11 Failed (Write/Read Values): 0A / 00
Module test with this pattern FAILED!
Testing Top SPI, Mask 0x55:
Reg Addr = 2 Failed (Write/Read Values): 15 / 00
Reg Addr = 3 Failed (Write/Read Values): 15 / 00
Reg Addr = 5 Failed (Write/Read Values): 16 / 00
Reg Addr = 6 Failed (Write/Read Values): 05 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 55 / 00
Reg Addr = 9 Failed (Write/Read Values): 55 / 00
Reg Addr = 10 Failed (Write/Read Values): 01 / 00
Reg Addr = 11 Failed (Write/Read Values): 15 / 00
Module test with this pattern FAILED!

Testing TxPLL VTUNE registers:
Some problems with VTUNE registers:
VTUNE_H (should be/acctual): 1/1;
VTUNE_H (should be/acctual): 0/1;
VTUNE_L (should be/acctual): 1/1;
VTUNE_L (should be/acctual): 0/1;

Testing RxPLL VTUNE registers:
Some problems with VTUNE registers:
VTUNE_H (should be/acctual): 1/1;
VTUNE_H (should be/acctual): 0/1;
VTUNE_L (should be/acctual): 1/1;
VTUNE_L (should be/acctual): 0/1;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

and When i connected the RF board to the FMC connector on Zipper board then connect usb cable from zipper to PC and i run register test --> all of register failed in the test.

and this what i got
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
addr: 0x04
Testing TxRF SPI, Mask 0xAA:
Reg Addr = 0 Failed (Write/Read Values): 02 / 00
Reg Addr = 1 Failed (Write/Read Values): 0A / 00
Reg Addr = 2 Failed (Write/Read Values): AA / 00
Reg Addr = 3 Failed (Write/Read Values): AA / 00
Reg Addr = 4 Failed (Write/Read Values): 0A / 00
Reg Addr = 5 Failed (Write/Read Values): AA / 00
Reg Addr = 6 Failed (Write/Read Values): AA / 00
Reg Addr = 7 Failed (Write/Read Values): AA / 00
Reg Addr = 8 Failed (Write/Read Values): 0A / 00
Reg Addr = 9 Failed (Write/Read Values): 0A / 00
Reg Addr = 10 Failed (Write/Read Values): 0A / 00
Reg Addr = 11 Failed (Write/Read Values): AA / 00
Reg Addr = 12 Failed (Write/Read Values): AA / 00
Reg Addr = 13 Failed (Write/Read Values): 80 / 00
Module test with this pattern FAILED!
Testing TxRF SPI, Mask 0x55:
Reg Addr = 0 Failed (Write/Read Values): 01 / 00
Reg Addr = 1 Failed (Write/Read Values): 15 / 00
Reg Addr = 2 Failed (Write/Read Values): 55 / 00
Reg Addr = 3 Failed (Write/Read Values): 55 / 00
Reg Addr = 4 Failed (Write/Read Values): 15 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 15 / 00
Reg Addr = 9 Failed (Write/Read Values): 15 / 00
Reg Addr = 10 Failed (Write/Read Values): 15 / 00
Reg Addr = 11 Failed (Write/Read Values): 55 / 00
Reg Addr = 12 Failed (Write/Read Values): 55 / 00
Module test with this pattern FAILED!

addr: 0x07
Testing RxFE SPI, Mask 0xAA:
Reg Addr = 0 Failed (Write/Read Values): 02 / 00
Reg Addr = 1 Failed (Write/Read Values): AA / 00
Reg Addr = 2 Failed (Write/Read Values): AA / 00
Reg Addr = 3 Failed (Write/Read Values): AA / 00
Reg Addr = 4 Failed (Write/Read Values): 2A / 00
Reg Addr = 5 Failed (Write/Read Values): AA / 00
Reg Addr = 6 Failed (Write/Read Values): 2A / 00
Reg Addr = 7 Failed (Write/Read Values): 2A / 00
Reg Addr = 8 Failed (Write/Read Values): 2A / 00
Reg Addr = 9 Failed (Write/Read Values): 2A / 00
Reg Addr = 10 Failed (Write/Read Values): AA / 00
Reg Addr = 11 Failed (Write/Read Values): AA / 00
Reg Addr = 12 Failed (Write/Read Values): 2A / 00
Reg Addr = 13 Failed (Write/Read Values): 0A / 00
Module test with this pattern FAILED!
Testing RxFE SPI, Mask 0x55:
Reg Addr = 0 Failed (Write/Read Values): 01 / 00
Reg Addr = 1 Failed (Write/Read Values): 55 / 00
Reg Addr = 2 Failed (Write/Read Values): 55 / 00
Reg Addr = 3 Failed (Write/Read Values): 55 / 00
Reg Addr = 4 Failed (Write/Read Values): 55 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 15 / 00
Reg Addr = 9 Failed (Write/Read Values): 15 / 00
Reg Addr = 10 Failed (Write/Read Values): 55 / 00
Reg Addr = 11 Failed (Write/Read Values): 55 / 00
Reg Addr = 12 Failed (Write/Read Values): 55 / 00
Reg Addr = 13 Failed (Write/Read Values): 05 / 00
Module test with this pattern FAILED!

addr: 0x06
Testing RxVga2 SPI, Mask 0xAA:
Reg Addr = 2 Failed (Write/Read Values): 2A / 00
Reg Addr = 3 Failed (Write/Read Values): 2A / 00
Reg Addr = 4 Failed (Write/Read Values): 2A / 00
Reg Addr = 5 Failed (Write/Read Values): 0A / 00
Reg Addr = 6 Failed (Write/Read Values): 2A / 00
Reg Addr = 7 Failed (Write/Read Values): 0A / 00
Reg Addr = 8 Failed (Write/Read Values): AA / 00
Reg Addr = 14 Failed (Write/Read Values): 80 / 00
Module test with this pattern FAILED!
addr: 0x05
Testing RxVga2 SPI, Mask 0x55:
Reg Addr = 2 Failed (Write/Read Values): 15 / 00
Reg Addr = 3 Failed (Write/Read Values): 15 / 00
Reg Addr = 4 Failed (Write/Read Values): 15 / 00
Reg Addr = 5 Failed (Write/Read Values): 15 / 00
Reg Addr = 6 Failed (Write/Read Values): 15 / 00
Reg Addr = 7 Failed (Write/Read Values): 05 / 00
Reg Addr = 8 Failed (Write/Read Values): 55 / 00
Reg Addr = 14 Failed (Write/Read Values): 40 / 00
Module test with this pattern FAILED!

Testing RxLPF SPI, Mask 0xAA:
Reg Addr = 2 Failed (Write/Read Values): 2A / 00
Reg Addr = 3 Failed (Write/Read Values): 2A / 00
Reg Addr = 4 Failed (Write/Read Values): 2A / 00
Reg Addr = 5 Failed (Write/Read Values): 2A / 00
Reg Addr = 6 Failed (Write/Read Values): 2A / 00
Reg Addr = 7 Failed (Write/Read Values): AA / 00
Reg Addr = 8 Failed (Write/Read Values): AA / 00
Reg Addr = 9 Failed (Write/Read Values): 2A / 00
Reg Addr = 10 Failed (Write/Read Values): AA / 00
Reg Addr = 11 Failed (Write/Read Values): AA / 00
Reg Addr = 12 Failed (Write/Read Values): AA / 00
Reg Addr = 13 Failed (Write/Read Values): AA / 00
Reg Addr = 14 Failed (Write/Read Values): AA / 00
Reg Addr = 15 Failed (Write/Read Values): 0A / 00
Module test with this pattern FAILED!
Testing RxLPF SPI, Mask 0x55:
Reg Addr = 2 Failed (Write/Read Values): 15 / 00
Reg Addr = 3 Failed (Write/Read Values): 15 / 00
Reg Addr = 4 Failed (Write/Read Values): 15 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 55 / 00
Reg Addr = 9 Failed (Write/Read Values): 55 / 00
Reg Addr = 10 Failed (Write/Read Values): 55 / 00
Reg Addr = 11 Failed (Write/Read Values): 55 / 00
Reg Addr = 12 Failed (Write/Read Values): 55 / 00
Reg Addr = 13 Failed (Write/Read Values): 55 / 00
Reg Addr = 14 Failed (Write/Read Values): 55 / 00
Reg Addr = 15 Failed (Write/Read Values): 15 / 00
Module test with this pattern FAILED!

addr: 0x03
Testing TxLPF SPI, Mask 0xAA:
Reg Addr = 2 Failed (Write/Read Values): 2A / 00
Reg Addr = 3 Failed (Write/Read Values): 2A / 00
Reg Addr = 4 Failed (Write/Read Values): 2A / 00
Reg Addr = 5 Failed (Write/Read Values): 2A / 00
Reg Addr = 6 Failed (Write/Read Values): AA / 00
Module test with this pattern FAILED!
Testing TxLPF SPI, Mask 0x55:
Reg Addr = 2 Failed (Write/Read Values): 15 / 00
Reg Addr = 3 Failed (Write/Read Values): 15 / 00
Reg Addr = 4 Failed (Write/Read Values): 15 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Module test with this pattern FAILED!

addr: 0x01
Testing TxPLL SPI, Mask 0xAA:
Reg Addr = 0 Failed (Write/Read Values): AA / 00
Reg Addr = 1 Failed (Write/Read Values): AA / 00
Reg Addr = 2 Failed (Write/Read Values): AA / 00
Reg Addr = 3 Failed (Write/Read Values): AA / 00
Reg Addr = 4 Failed (Write/Read Values): AA / 00
Reg Addr = 5 Failed (Write/Read Values): AA / 00
Reg Addr = 6 Failed (Write/Read Values): AA / 00
Reg Addr = 7 Failed (Write/Read Values): AA / 00
Reg Addr = 8 Failed (Write/Read Values): AA / 00
Reg Addr = 9 Failed (Write/Read Values): AA / 00
Reg Addr = 10 Failed (Write/Read Values): 2A / 00
Reg Addr = 11 Failed (Write/Read Values): AA / 00
Reg Addr = 12 Failed (Write/Read Values): AA / 00
Module test with this pattern FAILED!
Testing TxPLL SPI, Mask 0x55:
Reg Addr = 0 Failed (Write/Read Values): 55 / 00
Reg Addr = 1 Failed (Write/Read Values): 55 / 00
Reg Addr = 2 Failed (Write/Read Values): 55 / 00
Reg Addr = 3 Failed (Write/Read Values): 55 / 00
Reg Addr = 4 Failed (Write/Read Values): 55 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 55 / 00
Reg Addr = 9 Failed (Write/Read Values): 15 / 00
Reg Addr = 10 Failed (Write/Read Values): 15 / 00
Reg Addr = 11 Failed (Write/Read Values): 55 / 00
Reg Addr = 12 Failed (Write/Read Values): 55 / 00
Module test with this pattern FAILED!

addr: 0x02
Testing RxPLL SPI, Mask 0xAA:
Reg Addr = 0 Failed (Write/Read Values): AA / 00
Reg Addr = 1 Failed (Write/Read Values): AA / 00
Reg Addr = 2 Failed (Write/Read Values): AA / 00
Reg Addr = 3 Failed (Write/Read Values): AA / 00
Reg Addr = 4 Failed (Write/Read Values): AA / 00
Reg Addr = 5 Failed (Write/Read Values): AA / 00
Reg Addr = 6 Failed (Write/Read Values): AA / 00
Reg Addr = 7 Failed (Write/Read Values): AA / 00
Reg Addr = 8 Failed (Write/Read Values): AA / 00
Reg Addr = 9 Failed (Write/Read Values): AA / 00
Reg Addr = 10 Failed (Write/Read Values): 2A / 00
Reg Addr = 11 Failed (Write/Read Values): AA / 00
Reg Addr = 12 Failed (Write/Read Values): AA / 00
Module test with this pattern FAILED!
Testing RxPLL SPI, Mask 0x55:
Reg Addr = 0 Failed (Write/Read Values): 55 / 00
Reg Addr = 1 Failed (Write/Read Values): 55 / 00
Reg Addr = 2 Failed (Write/Read Values): 55 / 00
Reg Addr = 3 Failed (Write/Read Values): 55 / 00
Reg Addr = 4 Failed (Write/Read Values): 55 / 00
Reg Addr = 5 Failed (Write/Read Values): 55 / 00
Reg Addr = 6 Failed (Write/Read Values): 55 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 55 / 00
Reg Addr = 9 Failed (Write/Read Values): 15 / 00
Reg Addr = 10 Failed (Write/Read Values): 15 / 00
Reg Addr = 11 Failed (Write/Read Values): 55 / 00
Reg Addr = 12 Failed (Write/Read Values): 55 / 00
Module test with this pattern FAILED!

addr: 0x00
Testing Top SPI, Mask 0xAA:
Reg Addr = 2 Failed (Write/Read Values): 2A / 00
Reg Addr = 3 Failed (Write/Read Values): 2A / 00
Reg Addr = 5 Failed (Write/Read Values): AA / 00
Reg Addr = 6 Failed (Write/Read Values): 0A / 00
Reg Addr = 7 Failed (Write/Read Values): AA / 00
Reg Addr = 8 Failed (Write/Read Values): AA / 00
Reg Addr = 9 Failed (Write/Read Values): AA / 00
Reg Addr = 10 Failed (Write/Read Values): 02 / 00
Reg Addr = 11 Failed (Write/Read Values): 0A / 00
Module test with this pattern FAILED!
Testing Top SPI, Mask 0x55:
Reg Addr = 2 Failed (Write/Read Values): 15 / 00
Reg Addr = 3 Failed (Write/Read Values): 15 / 00
Reg Addr = 5 Failed (Write/Read Values): 16 / 00
Reg Addr = 6 Failed (Write/Read Values): 05 / 00
Reg Addr = 7 Failed (Write/Read Values): 55 / 00
Reg Addr = 8 Failed (Write/Read Values): 55 / 00
Reg Addr = 9 Failed (Write/Read Values): 55 / 00
Reg Addr = 10 Failed (Write/Read Values): 01 / 00
Reg Addr = 11 Failed (Write/Read Values): 15 / 00
Module test with this pattern FAILED!

Testing TxPLL VTUNE registers:
Some problems with VTUNE registers:
VTUNE_H (should be/acctual): 1/1;
VTUNE_H (should be/acctual): 0/1;
VTUNE_L (should be/acctual): 1/1;
VTUNE_L (should be/acctual): 0/1;

Testing RxPLL VTUNE registers:
Some problems with VTUNE registers:
VTUNE_H (should be/acctual): 1/1;
VTUNE_H (should be/acctual): 0/1;
VTUNE_L (should be/acctual): 1/1;
VTUNE_L (should be/acctual): 0/1;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

i hope if any one can help me about the above steps or there is something messing,

Thanks a lot
Gasser

Thanks a lot ,i will check it.
and if any one have something else .please post it,

Thanks
Gasser