Setting up a (used) LimeSDR USB - loopback test failing

Hello, a colleague had given me a LimeSDR USB, which is being tested on my laptop. I had somehow bricked the firmware for Cypress, but was able to figure it out eventually and reflashed the FX3 firmware. Now, I am noticing the RF loopback (internal) test fails 100%. But is this a false indication?

  1. Can I proceed to use the system for RF carrier generation/reception, or does the test HAVE to pass for the board to be useable? I only have this one hardware.

  2. Do I have to reflash the FPGA now? How can I confirm the image in the FGPA? (I am using: LMS7002 Software Version 19.04.1-PothosSDR-202.01.26-vc14-x64)

Per LimeUtil it has got the latest firmware
PS C:\Users\Eva> LimeUtil --update
Connected to [LimeSDR-USB [USB 3.0] 9060B00491B2A]
Existing firmware is same as update (4)
Existing gateware is same as update (2.21)
Firmware and Gateware update is not required.

Programming update complete!


**Here is the output of the QuickTest**

PS C:\Users\Eva> LimeQuickTest --help
[ TESTING STARTED ]
->Start time: Wed Apr 22 00:28:45 2020

->Device: LimeSDR-USB, media=USB 3.0, module=FX3, serial=0009060B00491B2A, index=0
  Serial Number: 0009060B00491B2A

[ Clock Network Test ]
->FX3 GPIF clock test
  Test results: 17416; 21172; 24928 - PASSED
->Si5351C test
  CLK0: 17554 / 17554 - PASSED
  CLK1: 17554 / 17554 - PASSED
  CLK2: 17554 / 17554 - PASSED
  CLK3: 17554 / 17554 - PASSED
  CLK4: 17554 / 17554 - PASSED
  CLK5: 17554 / 17554 - PASSED
  CLK6: 17554 / 17554 - PASSED
->ADF4002 Test
  Result: 10 - PASSED
->VCTCXO test
  Results : 5112944 (min); 5113071 (max) - PASSED
->Clock Network Test PASSED

[ FPGA EEPROM Test ]
->Read EEPROM
->Read data: 11 02 14 11 02 14 02
->FPGA EEPROM Test PASSED

[ LMS7002M Test ]
->Perform Registers Test
->External Reset line test
  Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
  Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED

[ RF Loopback Test ]
Note: The test should be run without anything connected to RF ports
->Configure LMS
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
LML TX phase search FAIL
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
LML TX phase search FAIL
Failed to set sample rate
->RF Loopback Test FAILED

=> Board tests FAILED <=

Elapsed time: 1.82 seconds

update: I de-installed the PothosSDR (2020 version) and I installed the 2019.03.24 version of pothosSDR - and wanted to test using an earlier code base. The gateware and firmware were downgraded.

PS C:\Users\Eva> LimeUtil --update
Connected to [LimeSDR-USB [USB 3.0] 9060B00491B2A]
Existing firmware is same as update (4)
Existing gateware is same as update (2.20)
Firmware and Gateware update is not required.

So, if I run the LimeQuickTest now, no output is observed in Windows 10 power shell, but I don’t know if that is because this older LimeQuickTest is functional or not.

I can however (obviously) load up PothosSDR environment and create flow-graphs.

I observe the FPGA device running relatively warm, though I am not doing anything. (It’s just plugged in). Is this normal?

Would anyone have a Hello World tutorial for Tx/Rx to check out photosSDR and LimeSDR-USB?

Thanks.

PS C:\Users\Eva> SoapySDRUtil --probe="driver=lime"
######################################################
##     Soapy SDR -- the SDR abstraction library     ##
######################################################

Probe device driver=lime
[INFO] Make connection: 'LimeSDR-USB [USB 3.0] 9060B00491B2A'
[INFO] Reference clock 30.72 MHz
[INFO] Device name: LimeSDR-USB
[INFO] Reference: 30.72 MHz
e[1me[31m[ERROR] SetPllFrequency: error configuring phasee[0m
[INFO] LMS7002M calibration values caching Disable
e[1me[31m[ERROR] SetPllFrequency: error configuring phasee[0m

----------------------------------------------------
-- Device identification
----------------------------------------------------
  driver=FX3
  hardware=LimeSDR-USB
  boardSerialNumber=0x491b2a
  firmwareVersion=4
  gatewareVersion=2.20
  hardwareVersion=4
  protocolVersion=1

----------------------------------------------------
-- Peripheral summary
----------------------------------------------------
  Channels: 2 Rx, 2 Tx
  Timestamps: YES
  Sensors: clock_locked, lms7_temp
  Registers: BBIC, RFIC0
  GPIOs: MAIN

----------------------------------------------------
-- RX Channel 0
----------------------------------------------------
  Full-duplex: YES
  Supports AGC: NO
  Stream formats: CF32, CS12, CS16
  Native format: CS16 [full-scale=2048]
  Stream args:
     * Buffer Length - The buffer transfer size over the link.
       [key=bufferLength, units=samples, default=0, type=int]
     * Link Format - The format of the samples over the link.
       [key=linkFormat, default=CS16, type=string, options=(CS16, CS12)]
     * Skip Calibration - Skip automatic activation calibration.
       [key=skipCal, default=false, type=bool]
  Antennas: NONE, LNAH, LNAL, LNAW, LB1, LB2
  Corrections: DC removal, DC offset
  Full gain range: [-12, 61] dB
    TIA gain range: [0, 12] dB
    LNA gain range: [0, 30] dB
    PGA gain range: [-12, 19] dB
  Full freq range: [0, 3800] MHz
    RF freq range: [30, 3800] MHz
    BB freq range: [-10, 10] MHz
  Tune args:
     * LO Offset - Tune the LO with an offset and compensate with the baseband CORDIC.
       [key=OFFSET, units=Hz, default=0.0, type=float, range=[-1e+07, 1e+07]]
     * BB - Specify a specific value for this component or IGNORE to skip tuning it.
       [key=BB, units=Hz, default=DEFAULT, type=float, range=[-1e+07, 1e+07], options=(DEFAULT, IGNORE)]
  Sample rates: [0.1, 65] MSps
  Filter bandwidths: [1.4, 130] MHz
  Sensors: lo_locked
  Other Settings:
     * TSP DC Level - Digital DC level in LMS7002M TSP chain.
       [key=TSP_CONST, type=int, range=[0, 32767]]

----------------------------------------------------
-- RX Channel 1
----------------------------------------------------
  Full-duplex: YES
  Supports AGC: NO
  Stream formats: CF32, CS12, CS16
  Native format: CS16 [full-scale=2048]
  Stream args:
     * Buffer Length - The buffer transfer size over the link.
       [key=bufferLength, units=samples, default=0, type=int]
     * Link Format - The format of the samples over the link.
       [key=linkFormat, default=CS16, type=string, options=(CS16, CS12)]
     * Skip Calibration - Skip automatic activation calibration.
       [key=skipCal, default=false, type=bool]
  Antennas: NONE, LNAH, LNAL, LNAW, LB1, LB2
  Corrections: DC removal, DC offset
  Full gain range: [-12, 61] dB
    TIA gain range: [0, 12] dB
    LNA gain range: [0, 30] dB
    PGA gain range: [-12, 19] dB
  Full freq range: [0, 3800] MHz
    RF freq range: [30, 3800] MHz
    BB freq range: [-10, 10] MHz
  Tune args:
     * LO Offset - Tune the LO with an offset and compensate with the baseband CORDIC.
       [key=OFFSET, units=Hz, default=0.0, type=float, range=[-1e+07, 1e+07]]
     * BB - Specify a specific value for this component or IGNORE to skip tuning it.
       [key=BB, units=Hz, default=DEFAULT, type=float, range=[-1e+07, 1e+07], options=(DEFAULT, IGNORE)]
  Sample rates: [0.1, 65] MSps
  Filter bandwidths: [1.4, 130] MHz
  Sensors: lo_locked
  Other Settings:
     * TSP DC Level - Digital DC level in LMS7002M TSP chain.
       [key=TSP_CONST, type=int, range=[0, 32767]]

----------------------------------------------------
-- TX Channel 0
----------------------------------------------------
  Full-duplex: YES
  Supports AGC: NO
  Stream formats: CF32, CS12, CS16
  Native format: CS16 [full-scale=2048]
  Stream args:
     * Buffer Length - The buffer transfer size over the link.
       [key=bufferLength, units=samples, default=0, type=int]
     * Link Format - The format of the samples over the link.
       [key=linkFormat, default=CS16, type=string, options=(CS16, CS12)]
     * Skip Calibration - Skip automatic activation calibration.
       [key=skipCal, default=false, type=bool]
  Antennas: NONE, BAND1, BAND2
  Corrections: DC offset
  Full gain range: [-12, 64] dB
    PAD gain range: [0, 52] dB
    IAMP gain range: [-12, 12] dB
  Full freq range: [0, 3800] MHz
    RF freq range: [30, 3800] MHz
    BB freq range: [-10, 10] MHz
  Tune args:
     * LO Offset - Tune the LO with an offset and compensate with the baseband CORDIC.
       [key=OFFSET, units=Hz, default=0.0, type=float, range=[-1e+07, 1e+07]]
     * BB - Specify a specific value for this component or IGNORE to skip tuning it.
       [key=BB, units=Hz, default=DEFAULT, type=float, range=[-1e+07, 1e+07], options=(DEFAULT, IGNORE)]
  Sample rates: [0.1, 65] MSps
  Filter bandwidths: [5, 40], [50, 130] MHz
  Sensors: lo_locked
  Other Settings:
     * TSP DC Level - Digital DC level in LMS7002M TSP chain.
       [key=TSP_CONST, type=int, range=[0, 32767]]

----------------------------------------------------
-- TX Channel 1
----------------------------------------------------
  Full-duplex: YES
  Supports AGC: NO
  Stream formats: CF32, CS12, CS16
  Native format: CS16 [full-scale=2048]
  Stream args:
     * Buffer Length - The buffer transfer size over the link.
       [key=bufferLength, units=samples, default=0, type=int]
     * Link Format - The format of the samples over the link.
       [key=linkFormat, default=CS16, type=string, options=(CS16, CS12)]
     * Skip Calibration - Skip automatic activation calibration.
       [key=skipCal, default=false, type=bool]
  Antennas: NONE, BAND1, BAND2
  Corrections: DC offset
  Full gain range: [-12, 64] dB
    PAD gain range: [0, 52] dB
    IAMP gain range: [-12, 12] dB
  Full freq range: [0, 3800] MHz
    RF freq range: [30, 3800] MHz
    BB freq range: [-10, 10] MHz
  Tune args:
     * LO Offset - Tune the LO with an offset and compensate with the baseband CORDIC.
       [key=OFFSET, units=Hz, default=0.0, type=float, range=[-1e+07, 1e+07]]
     * BB - Specify a specific value for this component or IGNORE to skip tuning it.
       [key=BB, units=Hz, default=DEFAULT, type=float, range=[-1e+07, 1e+07], options=(DEFAULT, IGNORE)]
  Sample rates: [0.1, 65] MSps
  Filter bandwidths: [5, 40], [50, 130] MHz
  Sensors: lo_locked
  Other Settings:
     * TSP DC Level - Digital DC level in LMS7002M TSP chain.
       [key=TSP_CONST, type=int, range=[0, 32767]]

You could try the old manual LimeSDR USB Quick Test method, whereby you load a waveform file in LimeSuiteGUI, “play” this and then observe the output with FFT Viewer via loopback.

https://wiki.myriadrf.org/LimeSDR-USB_Quick_Test

1 Like

After a long time away from SDR I’m caught up on other projects (ham radio, business) and got a request from another ham to use this LimeSDR-USB board. But when I downloaded the absolute latest Pothos toolchain for Windows 10 and ran the bin/LimeSuiteGUI.exe application, it could not pass step 3.2 Load the Configuration File of https://wiki.myriadrf.org/LimeSDR-USB_Quick_Test as you suggest. Well I captured the debug output and hope that someone can tell me what to try next … please?

[00:24:16] DEBUG: INT 132, FRAC 753664, DIV_LOCH 0, EN_DIV2_DIVPROG 0
[00:24:16] DEBUG: VCO 4200.00 MHz, RefClk 30.72 MHz
[00:24:16] DEBUG: ICT_VCO: 255
[00:24:16] DEBUG: csw=64 cmphl=0
[00:24:16] DEBUG: csw=96 cmphl=3
[00:24:16] DEBUG: csw=80 cmphl=0
[00:24:16] DEBUG: csw=88 cmphl=2
[00:24:16] DEBUG: csw=92 cmphl=2
[00:24:16] DEBUG: csw=94 cmphl=3
[00:24:16] DEBUG: csw=93 cmphl=3
[00:24:16] DEBUG: Failed to lock
[00:24:16] DEBUG: csw=192 cmphl=3
[00:24:16] DEBUG: csw=160 cmphl=3
[00:24:16] DEBUG: csw=144 cmphl=3
[00:24:16] DEBUG: csw=136 cmphl=3
[00:24:16] DEBUG: csw=132 cmphl=3
[00:24:16] DEBUG: csw=130 cmphl=3
[00:24:16] DEBUG: csw=129 cmphl=3
[00:24:16] DEBUG: Failed to lock
[00:24:16] DEBUG: cmphl=2
[00:24:16] DEBUG: VCOL : csw=90 tune ok
[00:24:16] DEBUG: ICT_VCO: 255
[00:24:16] DEBUG: TuneVCO(SXT) - VCO too high
[00:24:16] DEBUG: VCOM : csw=0 tune fail
[00:24:16] DEBUG: ICT_VCO: 255
[00:24:16] DEBUG: TuneVCO(SXT) - VCO too high
[00:24:16] DEBUG: VCOH : csw=0 tune fail
[00:24:16] DEBUG: Selected: VCOL
[00:24:16] DEBUG: csw 180; interval [178, 183]
[00:24:16] DEBUG: M=252, N=6, Fvco=1290.240 MHz
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz
[00:24:16] WARNING: SetPllFrequency: error configuring phase
[00:24:16] ERROR: LML TX phase search FAIL
[00:24:16] DEBUG: M=252, N=12, Fvco=1290.240 MHz

And for details of the current installation:

C:\Program Files\PSDR\bin>LimeUtil --find

  • [LimeSDR-USB, media=USB 3.0, module=FX3, serial=0009060B00491B2A, index=0]

C:\Program Files\PSDR\bin>LimeUtil --update
Connected to [LimeSDR-USB [USB 3.0] 9060B00491B2A]
Existing firmware is same as update (4)
Existing gateware is same as update (2.23)
Firmware and Gateware update is not required.

Programming update complete!

C:\Program Files\PSDR\bin>LimeUtil --info
######################################################

LimeSuite information summary

######################################################

Version information:
Library version: v20.10.0-PothosSDR-2021.01.28-vc16-x64
Build timestamp: 2021-01-28
Interface version: v2020.10.0
Binary interface: 20.10-1

System resources:
Installation root: C:\Program Files\PSDR
User home directory: C:\Users\Eva\AppData\Roaming\SPB_Data
App data directory: C:\Users\Eva\AppData\Roaming/LimeSuite
Config directory: C:\Users\Eva\AppData\Roaming\SPB_Data/.limesuite
Image search paths:
- C:\Users\Eva\AppData\Roaming/LimeSuite/images
- C:\Program Files\PSDR/share/LimeSuite/images

Supported connections:

  • FT601
  • FX3
  • PCIEXillybus

Now that you have a more recent version of Lime Suite installed, could you try running LimeQuickTest again.

I am providing a current LimeQuickTest report below. The board is plugged into a USB3 hub by itself, there are no cables connected to it. Is there a need to reset the board to its default configuration before running this test - and if there is, can you provide the steps? If not, can it be sent back for repair?

c:\Program Files\PSDR\bin>LimeQuickTest
[ TESTING STARTED ]
->Start time: Mon Mar 1 11:10:29 2021
->LimeSuite version: 20.10.0-PothosSDR-2021.01.28-vc16-x64

->Device: LimeSDR-USB, media=USB 3.0, module=FX3, serial=0009060B00491B2A, index=0, HW=4, GW=2.23
Serial Number: 0009060B00491B2A
Chip temperature: 50 C

[ Clock Network Test ]
->FX3 GPIF clock test
Test results: 20422; 24178; 27934 - PASSED
->Si5351C test
CLK0: 17554 / 17554 - PASSED
CLK1: 17554 / 17554 - PASSED
CLK2: 17554 / 17554 - PASSED
CLK3: 17554 / 17554 - PASSED
CLK4: 17554 / 17554 - PASSED
CLK5: 17554 / 17554 - PASSED
CLK6: 17554 / 17554 - PASSED
->ADF4002 Test
Result: 10 - PASSED
->VCTCXO test
Results : 5112939 (min); 5113067 (max) - PASSED
->Clock Network Test PASSED

[ FPGA EEPROM Test ]
->Read EEPROM
->Read data: 11 02 14 11 02 14 02
->FPGA EEPROM Test PASSED

[ LMS7002M Test ]
->Perform Registers Test
->External Reset line test
Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED

[ RF Loopback Test ]
Note: The test should be run without anything connected to RF ports
->Configure LMS
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
LML TX phase search FAIL
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
LML TX phase search FAIL
Failed to set sample rate
->RF Loopback Test FAILED

=> Board tests FAILED <=

Elapsed time: 3.81 seconds

c:\Program Files\PSDR\bin>

Is there anything connected to the ports?
If so, it will fail the loopback test.

Ed

AA7QQ, there is absolutely nothing connected to the board as I stated.

The board is plugged into a USB3 hub by itself, there are no cables connected to it.

Just puzzled as I see others have also suffered from this, and the remedy seems to be that it has to be sent back - but today, I got a note from CrowdStrike, and this is also puzzling (I got this board from a friend who is not in touch with me for several years) as it might mean the board cannot be swapped - but is any repair service available?

In separate e-mail from Lime itself I was directed to get technical support through the myriadrf.org platform (this discourse) but which party can provide repair services? Here is the response from Crowd Supply.

New reply for the ticket #OTH00006359

Hi there,

Thanks for reaching out! Unfortunately no, we do require the invoice. Additionally - for Crowd Supply products we only provide a 30-day return guarantee, which starts from when the product was delivered to the customer. Lime provides a 90-day warranty from delivery, but still either of those options are far out of reach for a part that was delivered years ago.

Because of this, we can’t provide RMA on this LimeSDR, but we do recommend you check out the MyriadRF forums for technical support:
https://discourse.myriadrf.org/c/projects/limesdr

If you have any other general questions about how Crowd Supply works, please see our Guide: https://www.crowdsupply.com/guide

Take care and be well!

Regards,

Crowd Supply Support

If you could plug the board directly into a USB 3.0 port on your computer instead of a hub. It is possible that a hub could be causing problems and best to eliminate whatever we can.

We do not offer any repair service, but the design documents have been published to GitHub and you may find a 3rd party who could offer such services.

@Zack, do you have anything else to suggest?

I just took out the entire USB3 hub (connected to a bonafide USB3 powered port on my laptop, which had its own dedicated power supply) and plugged the LimeSDR-USB board directly into the USB port. It was recognized and I then did a LimeQuickTest.exe. I noticed the temperature at a low 30+C as it was just plugged in, but otherwise I think the results speak for themselves. Is this likely a hardware error (repair of PCB), firmware error (loading of correct gateware), a test scripting error, or other?

C:\Program Files\PSDR\bin>LimeQuickTest.exe
[ TESTING STARTED ]
->Start time: Tue Mar 2 12:18:58 2021
->LimeSuite version: 20.10.0-PothosSDR-2021.01.28-vc16-x64

->Device: LimeSDR-USB, media=USB 3.0, module=FX3, serial=0009060B00491B2A, index=0, HW=4, GW=2.23
Serial Number: 0009060B00491B2A
Chip temperature: 37 C

[ Clock Network Test ]
->FX3 GPIF clock test
Test results: 17938; 21694; 25450 - PASSED
->Si5351C test
CLK0: 17554 / 17554 - PASSED
CLK1: 17554 / 17554 - PASSED
CLK2: 17554 / 17554 - PASSED
CLK3: 17554 / 17554 - PASSED
CLK4: 17554 / 17554 - PASSED
CLK5: 17554 / 17554 - PASSED
CLK6: 17554 / 17554 - PASSED
->ADF4002 Test
Result: 10 - PASSED
->VCTCXO test
Results : 5112944 (min); 5113071 (max) - PASSED
->Clock Network Test PASSED

[ FPGA EEPROM Test ]
->Read EEPROM
->Read data: 11 02 14 11 02 14 02
->FPGA EEPROM Test PASSED

[ LMS7002M Test ]
->Perform Registers Test
->External Reset line test
Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED

[ RF Loopback Test ]
Note: The test should be run without anything connected to RF ports
->Configure LMS
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
LML TX phase search FAIL
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
SetPllFrequency: error configuring phase
LML TX phase search FAIL
Failed to set sample rate
->RF Loopback Test FAILED

=> Board tests FAILED <=
Elapsed time: 4.44 seconds
C:\Program Files\PSDR\bin>

hmm. Any way to debug and get more detail in : SetPIIFrequency command? How can one initiate it manually and capture which part of the hardware is buggy? What has been the resolution for all the others who have had this problem? Searched high and low.

@Zack see previous posts. The board is a few years old now and 2nd hand also. Hence looks like they will have to find someone who can carry out repairs.