No signals

Hey Group
I can´t get my LimeSDR-USB3 module to play nice.
No signals at all, no 2.4Ghz wifi signals and no 88-108Mhz FM broadcast signals?
the only signal i got it, to show/play is a signal on 27Mhz CB and a 144Mhz HAM signal I transmit 1 meter away from the LimeSDR board?

Has anyone any starter problemes like mine?

some info:
Win10 v1909
Windows-drivers-master v1.2.3.14
LimeQuickTest gives all passed

Version information:
Library version: v19.04.1-PothosSDR-2020.01.26-vc14-x64
Build timestamp: 2020-01-26
Interface version: v2019.1.0
Binary interface: 19.04-1

You might need to adjust the gain. Its key to all sdr. Also important is the antenna. You wont get everything on a small indoor antenna. wifi is tricky as it looks like noise. Youll need the bandwidth at Max which may cause your PC to work hard. Im not sure what SDR software youre using. Some dont work well.

Try SDRConsole.

Hello thanks for your kind response.
I have tried SDR Sharp, SDRConsol SDRAngle and CubicSDR
SDRSharp seems to work but with no RF signal.
SDRConsol seems to work too, but crashes and hangs and no RF signal.
SDRAngle can´t get it to work, probably my fault, I have not spend much time trying out SDRAngle yet.
CubicSDR Seems stable but no RF there either.
I have tried all the antenna ports RX1 H L W and RX2 H L W, I got FL-SMA adaptors on the first port set (RX1-HLW) but i only have 3 small RP-SMA WIFI antennas on, for the test, but in Denmark we have 99.6Mhz WFM witch can be received all over with a simple coat hanger or a small piece of cord, (very strong signal).
I Imagine that wifi sounds like white noise, but it should show up as a big signal spike in my SDR Spectrum monitor, right?
Can it be a power issue, I only power feed the LimeSDR-USB3 module by a single USB3 plug from the laptop, perhaps i´ll try the external LimeSDR DC Jack onboard…

You didnt mention if you used Gain adjustment. You wont get any signal if you dont adjust this. Its not automatic. You have to adjust this on all software.

AGC and the manual knobs in the software (SDR Console SDR Sharp etc.) is all tried out, but to no avail, is there a gain option in LimeSuite that perhaps i have over seen?
Still absolutely deaf Lime Modules here.
Do you have a .ini file for your LimeSDR-USB3 module that i can try?
Best Regards.

Are you mixing SMA & RP-SMA connectors, by chance? It cannot work that way.

Ed

Thanks for your reply.
No, male and female all fits all together, thin pin inside fits the SMA antenna hole. :frowning: But yes, the way LimeSDR behaves looks like it, total deaf. the only signal i have is a big center spike, no matter what frequency i try, so it is not a real signal but, a fake of some sort. all hardware self test passes…

Id still look at the antenna and cabling. Maybe you have a short somewhere. What antenna do you have. The antenna is also critical to what you will receive. Start checking with a multimeter. I see you are a ham (so am I) so I will assume you can do fault finding on antenna systems.

Something else to try - if you used the drivers from FTDI website. Delete and let Windows install its own drivers. Ive had trouble with the FTDI drivers.

AFAIK any settings made in LimeSuiteGUI will be lost when you run up an application, as this will reset the SDR. Generally speaking, you shouldn’t need to use LimeSuiteGUI. Same applies to loading settings via an INI and to use one with your application, I think it would have to load it.

You’ve tried selecting the different antenna/LNA inputs?

check. I have tried both RX1_W RX1_L RX1_H and RX2_W RX2_L RX2_H!
check. There is only one driver for the LimeSDR-USB board (Windows-drivers-master.zip)
check. crosses tested and checked cabling, and plugs polarity.
Question: Is all settings in LimeSuiteGUI lost when I run SDR Console, SDRSharp, or SDRAngle?

Yes, because LimeSuiteGUI will close the SDR before exiting and then the next app will open it again. If you wanted to use settings from LimeSuiteGUI, you would have to save them to an INI file and then whatever application you were using would have to load them from this file. However, this shouldn’t really be necessary and the application should be doing whatever configuration is required itself.

So LimeQuickTest is passing on all the tests, right? If you could also try the old, more manual method of testing, which can only be used with LimeSDR USB.

https://wiki.myriadrf.org/LimeSDR-USB_Quick_Test

Hi and thanks for you time and response. :slight_smile:
Have made this test in the past, but here i try to document it.
https://wiki.myriadrf.org/LimeSDR-USB_Quick_Test

log after 3.7
https://pastebin.com/aj1CJWN0
screen 3.7
https://paste.pics/8Q1PB

screen 4.5
https://paste.pics/8Q1R6

log after 4.7
https://pastebin.com/R6jm61V2
screen 4.7
https://paste.pics/8Q1TY

log after 5
https://pastebin.com/KxtHhgne

I do not have a oscilloscope, but i receive a nice signal at 144.2Mhz with my 2meter 144Mhz transceiver.

I´m not sure what to make of it? :slight_smile:

Many thanks.

@Zack, could you take a look please and advise.

Hi @andrewback
are you and @Zack involved in the development in anyway?
Cause I´m thinking to do a return RMA case, then I´m thinking, if it´s ok to use you and Zack as reference in my mail. To tell that in the last month I´v not been able to get any signal in my Lime board, even by the help of you guys.
But only if it is ok by you and Zack

Hi @foggy,

Post the log file of LimeQuickTest application here, please.

Hi @Zack and other great help ful people.

Done some in depth testing here.
Most of the time i get “All Passed” from LimeQuickTest
BUT now i realize that i get two oddities
After A while , just connected by USB, with no usage, i can get:
C:\Users\foggy>LimeQuicktest
[ TESTING STARTED ]
->Start time: Fri May 15 12:05:42 2020

TransferPacket: Read failed (ret=0)
Gateware version mismatch!
Expected gateware version 2, revision 21
But found version 0, revision 0
Follow the FW and FPGA upgrade instructions:
http://wiki.myriadrf.org/Lime_Suite#Flashing_images
Or run update on the command line: LimeUtil --update

->Device: LimeSDR-USB, media=USB 3.0, module=FX3, serial=0009081C05C42C3A, index=0
Serial Number: 0009081C05C42C3A

[ Clock Network Test ]
->FX3 GPIF clock test
Test results: 1; 0; 0 - PASSED
->Si5351C test
CLK0: 2 / 17554 - FAILED
CLK1: 2 / 17554 - FAILED
CLK2: 2 / 17554 - FAILED
CLK3: 2 / 17554 - FAILED
CLK4: 2 / 17554 - FAILED
CLK5: 2 / 17554 - FAILED
CLK6: 2 / 17554 - FAILED
FAILED
->ADF4002 Test
Result: 0 - FAILED
FAILED
->VCTCXO test
Results : 4 (min); 4 (max) - FAILED
FAILED
->Clock Network Test FAILED

[ FPGA EEPROM Test ]
->Read EEPROM
->Read data: 13 02 1A 13 02 1A 02
->FPGA EEPROM Test PASSED

[ LMS7002M Test ]
->Perform Registers Test
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed
RegistersTest() failed
->LMS7002M Test FAILED

[ RF Loopback Test ]
Note: The test should be run without anything connected to RF ports
->Configure LMS
TuneVCO(CGEN) - failed to lock (cmphl!=0)
SetFrequencyCGEN(80 MHz) failed
TuneVCO(CGEN) - failed to lock (cmphl!=0)
SetFrequencyCGEN(491.52 MHz) failed
Failed to set sample rate
->RF Loopback Test FAILED

=> Board tests FAILED <=

Elapsed time: 2.45 seconds

and just after a limeutil -update
in Limesuitegui i some times get:
[12:00:24] ERROR: TransferPacket: Read failed (ret=0)
[12:00:24] WARNING: Gateware version mismatch!
Expected gateware version 2, revision 21
But found version 0, revision 0
Follow the FW and FPGA upgrade instructions:
http://wiki.myriadrf.org/Lime_Suite#Flashing_images
Or run update on the command line: LimeUtil --update

[12:00:24] INFO: Reference clock 10.00 MHz
[12:00:24] INFO: Connected Control port: LimeSDR-USB FW:4 HW:0 Protocol:1 GW:0.0 Ref Clk: 10.00 MHz

notice:
But found version 0, revision 0

and if i do a limeutil -update i get

C:\Users\foggy>LimeUtil --update
Connected to [LimeSDR-USB [USB 3.0] 9081C05C42C3A]
Existing firmware is same as update (4)
Existing gateware is same as update (2.21)
Firmware and Gateware update is not required.

Programming update complete!

Hi @foggy,

Sorry for late replay. You have to update the gateware to the latest which is 22 and where this kind of issue was addressed. Just use the latest LimeSuiteGUI for update and latest LimeQuickTest.