I have a stupid question: what “ADC sampling phase” parameter means?
Switching this bit (rising/falling edge) does not provide any changes on digital ADC interface, but it have critical effect in signal - for example, on rising edge i receive good constellation, and when i switch to falling edge then i result in crashed constellation.
I’m so confused - what is this? Datasheet does not answer to this, it just give this bit as fact…
UPD: i mean 0x5A register, bit RX_CTRL3.