LimeSDR-Mini 2.0 - LimeQuickTest FAILED!

Projects LimeSDR
1

Hello everyone,
I have the LimeSDR-Mini 2.0 (v2.2) and when I do the LimeQuickTest I have a failure. I am using the Master repository. This is what I get :

Card15Nodd:~$ LimeQuickTest 
[ TESTING STARTED ]
->Start time: Sat Jan 11 12:27:45 2025
->LimeSuite version: 23.11.0-g9dce3b6a

->Device: LimeSDR Mini, media=USB 3.0, module=FT601, addr=24607:1027, serial=1D90E2EE3D9564, HW=5, GW=2.2
  Serial Number: 1D90E2EE3D9564
 Chip temperature: 20 C

[ Clock Network Test ]
->REF clock test
  Test results: 42513; 45443; 48265 - PASSED
->VCTCXO test
  Results : 6710993 (min); 6711029 (max) - PASSED
->Clock Network Test PASSED

[ FPGA EEPROM Test ]
->Read EEPROM
FPGA EEPROM not supported in v2
->FPGA EEPROM Test PASSED

[ LMS7002M Test ]
->Perform Registers Test
->External Reset line test
  Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
  Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED

[ RF Loopback Test ]
->Configure LMS
->Run Tests (TX_2 -> LNA_W):
  CH0 (SXR=1000.0MHz, SXT=1005.0MHz): Result:(-30.4 dBFS, 5.00 MHz) - FAILED
->Run Tests (TX_1 -> LNA_H):
  CH0 (SXR=2100.0MHz, SXT=2105.0MHz): Result:(-20.9 dBFS, 5.00 MHz) - PASSED
->RF Loopback Test FAILED

=> Board tests FAILED <=

Elapsed time: 1.82 seconds

Is there a problem with the card ?
Why doesn’t the test pass ?
It’s not normal to have a failure with a new item.

2

Hi,
Everything seems ok, the failing test measurement is right on the edge of passing value (the passing value more than -30dBFS). The measurements can be affected by the temperature. You should try the test again, when the board is cold or warmed up, see if that changes the measured values.

3

The card is new.
I do the test when the card is cold, without antennas.
This failure bothers me a lot.
I have done a lot of testing in all conditions but it constantly fails.

4

Here is the result when the card has heated up, 43°C just by leaving it plugged in:

[ TESTING STARTED ]
->Start time: Sat Jan 11 19:02:06 2025
->LimeSuite version: 23.11.0-g9dce3b6a

->Device: LimeSDR Mini, media=USB 3.0, module=FT601, addr=24607:1027, serial=1D90E2EE3D9564, HW=5, GW=2.2
  Serial Number: 1D90E2EE3D9564
 Chip temperature: 43 C

[ Clock Network Test ]
->REF clock test
  Test results: 26705; 29635; 32457 - PASSED
->VCTCXO test
  Results : 6711047 (min); 6711083 (max) - PASSED
->Clock Network Test PASSED

[ FPGA EEPROM Test ]
->Read EEPROM
FPGA EEPROM not supported in v2
->FPGA EEPROM Test PASSED

[ LMS7002M Test ]
->Perform Registers Test
->External Reset line test
  Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
  Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED

[ RF Loopback Test ]
->Configure LMS
SetPllFrequency: timeout, busy bit is still 1
SetPllFrequency: timeout, busy bit is still 1
->Run Tests (TX_2 -> LNA_W):
  CH0 (SXR=1000.0MHz, SXT=1005.0MHz): Result:(-31.2 dBFS, 5.00 MHz) - FAILED
->Run Tests (TX_1 -> LNA_H):
  CH0 (SXR=2100.0MHz, SXT=2105.0MHz): Result:(-22.0 dBFS, 5.00 MHz) - PASSED
->RF Loopback Test FAILED

=> Board tests FAILED <=

Elapsed time: 7.62 seconds

It starts to bug even though it is new :

SetPllFrequency: timeout, busy bit is still 1
SetPllFrequency: timeout, busy bit is still 1

Do I have to return this card that I bought on eBay ?

5

Oh I missed that you have board v2.2, not the latest v2.4.
You can relax, your board is fine and within expected values. The expected value for your board version was -30±6dB.
The test is failing now because the software expected values were modified to be for the v2.4 board (changed RF test tolerance · myriadrf/LimeSuite@abc28c0 · GitHub)

This is coming from FPGA chip, PLL clocking issues can happen if it gets too hot. Generally the board should have active cooling to ensure stability.
The temperature that you see in the test is of the LMS7002M chip, but FPGA temperature is not measured and could be a lot higher. So your problems should go away if you add a fan to cool the board.

6

Can we not have this detect the version and set the pass/fail accordingly?

7

That would be great.
Not to be in doubt.

8

we can, it should have been done that way during the update.
I’ve pushed an update to take the board hardware version into account.

1 Like
9

Great, thank you very much.
When can we try it ?

10

it’s already in github, just pull the master branch.

11

I just tested it, it works perfectly. You are the best.

[ TESTING STARTED ]
->Start time: Sun Jan 12 20:59:14 2025
->LimeSuite version: 23.11.0-g5afabec5

->Device: LimeSDR Mini, media=USB 3.0, module=FT601, addr=24607:1027, serial=1D90E2EE3D9564, HW=5, GW=2.2
  Serial Number: 1D90E2EE3D9564
 Chip temperature: 29 C

[ Clock Network Test ]
->REF clock test
  Test results: 28612; 31542; 34364 - PASSED
->VCTCXO test
  Results : 6711020 (min); 6711056 (max) - PASSED
->Clock Network Test PASSED

[ FPGA EEPROM Test ]
->Read EEPROM
FPGA EEPROM not supported in v2
->FPGA EEPROM Test PASSED

[ LMS7002M Test ]
->Perform Registers Test
->External Reset line test
  Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
  Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED

[ RF Loopback Test ]
->Configure LMS
->Run Tests (TX_2 -> LNA_W):
  CH0 (SXR=1000.0MHz, SXT=1005.0MHz): Result:(-30.6 dBFS, 5.00 MHz) - PASSED
->Run Tests (TX_1 -> LNA_H):
  CH0 (SXR=2100.0MHz, SXT=2105.0MHz): Result:(-21.2 dBFS, 5.00 MHz) - PASSED
->RF Loopback Test PASSED

=> Board tests PASSED <=

Elapsed time: 1.56 seconds