Could you pls help me to check the connection of unused volatage pins?

Hello , alll,
Nowadays, i supply the sole 1.8V for the LMS7002M, of course , I used the inner LDO, I met a issue that I could not visit the SPI interface from FPGA, I have set the LMS_core_LDO_en=1,LMS_txen=0 and LMS_rxen=0.
we doubted the connection of the unused power pins, we connected the unused the power pins like the screemshot.

Could you pls help me to check it? especially the part circled it?

Best Regards!


Sorry, i have no experience with this.

Hi @huangdeyong123,

Refer to LimeSDR-Mini 1v1 schematic, where the internal LDOs are used.