How to configurate the sole voltage system with inner LDO?

Hi all,
Currently, We built a LMS7002M system with sole 1.8V power supply for the LMS7002M, of course, we want to use the inner LDO of LMS7002M,.We have checked the analog RSSI value of register 0x0605, found it vary with input analogue signal magnitude. of couse, we enable all LDO registers’ settings corresponding to the LDO tab in Limesuite GUI. but in the FPGA side, We foud only bit[10] of I channel and bit[1] of Q channel were not zeros, other bits are zeros, in spite of we changed the input analogue magnitude from signal generator. meanwhile, we read out the value of register 0x040E and 0x040F, but not changed with input analogue magnitude from signal generator. I have known that the mini LMS7002M board also with sole 1.8V power supply , is there an ini file of mini LMS7002M board for reference? Meanwhile, could you pls give us some valuable advice for reference?

Thanks very much!

Best Regards!

Hi @huangdeyong123,

Here is default register ini file for LimeSDR-Mini 1v1.

Do you mean there is no data coming from LMS7 Rx to FPGA? One thought if yes - are GFIRs bypassed in RxTSP?

Hi Zack,
Thanks for your quick response. but I can not open the mini board ini file sent by you. could you pls send it to my e-mail or resend the ini link again to me? my e-mail is
@Zydrunas Tamosevicius

Thanks again!

Best Regards!


Thanks Zack again!