Hi there,
I have a 82 MHz wide QPSK modulated signal centered at 650 MHz which needs to be demodulated.
I wonder if the LimeSDR-PCIe is capable of acquiring this signal?
I know the Digital Interface is not capable of handling it.
When I checked the LimeSDR-PCIe schematic I saw the analog interface is not connected (Correct me if I am wrong).
If acquisition is possible I would demodulate the signal in the FPGA and transfer the data through PCIe (164 Mbps needed).
What are your thoughts?
I think you should have enough bandwidth with the PCIe card - somehow I think it’ll run at least 100MHz bandwidth but I’m often wrong.
My current understanding of the the LimeSDR USB and LimeSDR PCIe is that if one can do what you want then the other one probably can as well. But there might be a little bit more room in the FPGA on the USB over the PCIe for two reasons:
- The PCIe FPGA is smaller EP4CGX 30 CF23C7N (PCIe) vs EP4CE 40 F23C8N (USB 3.0)
- Additional gateware needs to be loaded on the FPGA to drive the PCIe so there would be less free room on the FPGA.
I have no idea about the latency, but I would guess that the PCIe latency would be lower.
I am pretty sure the LIMESDR-PCIe can handle the bandwidth between the PC and itself.
What I am asking if LIMESDR-PCIe can acquire the 82 MHz analog bandwidth and digitize it.
My current understanding it that the USB and PCIe have the exact same bandwidth between the PC and the device.
As for whether the LMS7002M chip used in both can acquire 82MHz analog bandwidth, digitise it, demodulated within the board using custom FPGA code, to drop the data rate below the maximum data transfer limit, I would look at this post.
From the referred post I understand that when someone uses the digital interface the ADC sample rate determines the analog bandwidth (Which seems to be 60 MHz max for 120 MHz sampling rate).
My assumption was the analog interface is not available in the LIMESDR-PCIe board and the digital interface can only give me 60 MHz of RF bandwidth.
Is my assumption correct?