It is confusing.
The BOM for the LimeSDR with USB says
EP4CE40F23C8N (Cyclone IV E 2475 LABs 39600 LE 1161216 RAM(bits) 328 IOs)
and the BOM for the LimeSDR with PCle says
EP4CGX30CF23C7N (Cyclone IV GX 1840 LABs 29440 LE 1105920 RAM(bits) 290 IOs)
Which has to be wrong 1v2 (USB) and 1v0 (PCIe). The filename alone strongly suggests that the BOM on github for the PCIe card is out of date and needs a later version of these files checked in.
ref: https://github.com/myriadrf/LimeSDR-USB/blob/master/hardware/plug/1v2/Project%20Outputs%20for%20LimeSDR_1v2/BOM/LimeSDR_1v2_BOMr1.xls
ref: https://github.com/myriadrf/LimeSDR-PCIe/blob/master/hardware/1v0/LimeSDR-PCIe_1v0_DB_DFM_2015-11-16_r0/LimeSDR-PCIe_1v0_DB_DFM_r0/BOM/SoDeRa-PCIe_1v0_BOM.xls
EDIT: Although reading more about the “Cyclone IV GX FPGA”, this BOM could be right, it has PCI Express hard IP block included as well as four integrated 3.125-Gbps transceivers. This would match up exactly to the 4 lane PCIe of the LimeSDR PCIe card.