SetPllFrequency: error configuring phase

I’m using a limesdr mini, updated with the last LimeUtil on my Archlinux distribution:

Version information:
Library version: v18.06.0-18.06.0
Build timestamp: 2018-09-30
Interface version: v2018.6.0
Binary interface: 18.06-1

The quick test is passing:

     remy@StateOfTheArt ~ % LimeQuickTest                                    
    [ TESTING STARTED ]                                                     
    ->Start time: Sun Sep 30 18:49:31 2018                                                                                                           
    ->Device: LimeSDR Mini, media=USB 3.0, module=FT601, addr=24607:1027, serial=1D40EC646BF755
      Serial Number: 1D40EC646BF755                                         
    [ Clock Network Test ]                                                  
    ->REF clock test                                                        
      Test results: 39360; 52557; 218 - PASSED                              
    ->VCTCXO test                                                           
      Results : 6711063 (min); 6711223 (max) - PASSED                       
    ->Clock Network Test PASSED                                             
    [ FPGA EEPROM Test ]                                                    
    ->Read EEPROM                                                           
    ->Read data: 12 06 1C 12 06 1C 02                                       
    ->FPGA EEPROM Test PASSED                                               
    [ LMS7002M Test ]                                                       
    ->Perform Registers Test                                                
    ->External Reset line test                                              
      Reg 0x20: Write value 0xFFFD, Read value 0xFFFD                       
      Reg 0x20: value after reset 0x0FFFF                                   
    ->LMS7002M Test PASSED                                                  
    [ RF Loopback Test ]                                                    
    ->Configure LMS                                                         
    ->Run Tests (TX_2 -> LNA_W):                                            
      CH0 (SXR=1000.0MHz, SXT=1005.0MHz): Result:(-14.1 dBFS, 5.00 MHz) - PASSED
    ->Run Tests (TX_1 -> LNA_H):                                            
      CH0 (SXR=2100.0MHz, SXT=2105.0MHz): Result:(-14.2 dBFS, 5.00 MHz) - PASSED
    ->RF Loopback Test PASSED                                               
    => Board tests PASSED <=                                                
    Elapsed time: 2.63 seconds 

Yet, using gr-limesdr, I’m often faced with this kind of errors (see attached screenshot).

INFO: device_handler::set_chip_mode(): SISO mode set for device number 0.
INFO: device_handler::set_rf_freq(): RF frequency set [RX]: 868 MHz.
SetPllFrequency: error configuring phase

What am I doing wrong?

Hi, @rgrunbla

Could you do the following:

  1. Run this flow graph.
  2. Stop it, or if you get the error just leave it.
  3. Open LimeSuite and connect to your board.
  4. Click on “Chip–>GUI”.
  5. Save all the configuration to .ini file by pressing “Save”.
  6. Check your GW version of the board and post it here.
  7. Post configuration file (.ini file) and this GNU Radio flow graph file (.grc) here.
  8. Post your GNU Radio version.

I will try to reproduce this error.

Hi, thanks!

GRC file: :
Gnuradio version:

GNU Radio Companion

GW version/ HW version:

INFO: Connected Control port: LimeSDR-Mini FW:5 HW:0 Protocol:1 GW:1.26 Ref Clk: 40.00 MHz

The problem is not “reproductible” (as in what didn’t work yesterday works today), but there is always something problematic with some settings (just changing the SPS and frequency).


It shouldn’t be a software related issue. Since this is happening in some sort of chaotic way, you should check your board temperature. Software is trying to lock PLL’s but sometimes it fails. I have seen this issue when the board is too hot.

Ok! I’ll try to mount a radiator on my limesdr mini. Meanwhile, to add more about this erratic behaviour: sometimes, I have to change frequencies by 1MHz and it can “lock” the PLL.

I have other problems with gnuradio and the limesdr mini, but they will get their own threads :slight_smile:

Thank you.