I just received my LimeSDR. I updated the firmware and ran the LimeSDR test. I ran the test without inputs connected. I am using version 20.07.2 of LimeSuite and version 0.7.2 of SoapySDR on Ubuntu 20.04 box, everything connected via USB-3.0
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LimeSuite information summary
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Version information:
Library version: v20.07.2-ge7ad9eaf
Build timestamp: 2020-10-22
Interface version: v2020.7.2
Binary interface: 20.07-1System resources:
Installation root: /home/crroush/projects/wapsdr/dep/opt
User home directory: /home/crroush
App data directory: /home/crroush/.local/share/LimeSuite
Config directory: /home/crroush/.limesuite
Image search paths:
- /home/crroush/.local/share/LimeSuite/images
- /home/crroush/projects/wapsdr/dep/opt/share/LimeSuite/images[ TESTING STARTED ]
->Start time: Fri Oct 23 09:27:10 2020->Device: LimeSDR-USB, media=USB 3.0, module=FX3, addr=1d50:6108, serial=0009072C00D5071E, HW=4, GW=2.23
Serial Number: 0009072C00D5071E
Chip temperature: 45 C[ Clock Network Test ]
->FX3 GPIF clock test
Test results: 15025; 18781; 22537 - PASSED
->Si5351C test
CLK0: 17554 / 17554 - PASSED
CLK1: 17554 / 17554 - PASSED
CLK2: 17554 / 17554 - PASSED
CLK3: 17554 / 17554 - PASSED
CLK4: 17554 / 17554 - PASSED
CLK5: 17554 / 17554 - PASSED
CLK6: 17554 / 17554 - PASSED
->ADF4002 Test
Result: 10 - PASSED
->VCTCXO test
Results : 5112950 (min); 5113092 (max) - PASSED
->Clock Network Test PASSED[ FPGA EEPROM Test ]
->Read EEPROM
->Read data: 12 0C 07 12 0C 07 02
->FPGA EEPROM Test PASSED[ LMS7002M Test ]
->Perform Registers Test
->External Reset line test
Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED[ RF Loopback Test ]
Note: The test should be run without anything connected to RF ports
->Configure LMS
->Run Tests (TX_2-> LNA_L):
CH0 (SXR=800.0MHz, SXT=805.0MHz): Result:(-15.2 dBFS, 5.00 MHz) - PASSED
CH1 (SXR=800.0MHz, SXT=805.0MHz): Result:(-17.1 dBFS, 5.00 MHz) - PASSED
->Run Tests (TX_1 → LNA_W):
CH0 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-14.9 dBFS, 5.00 MHz) - PASSED
CH1 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-21.0 dBFS, 5.00 MHz) - FAILED
->Run Tests (TX_2-> LNA_H):
CH0 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-17.7 dBFS, 5.00 MHz) - PASSED
CH1 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-14.6 dBFS, 5.00 MHz) - PASSED
->RF Loopback Test FAILED=> Board tests FAILED <=
Elapsed time: 1.42 seconds
One of the loop back tests fails and when I run 50Mhz streaming using SOAPYSDR after about 5 minutes I begin receiving readStream Error: TIMEOUT Data looks good up in to that point