Hello, I just upgraded my LimeSuite to 19.04 and I just ran a self test.
It says
[perillamint@deepthought ~]$ LimeQuickTest
[ TESTING STARTED ]
->Start time: Sat Oct 26 19:44:25 2019
->Device: LimeSDR-USB, media=USB 3.0, module=FX3, addr=1d50:6108, serial=0009062000C41A1A
Serial Number: 0009062000C41A1A
[ Clock Network Test ]
->FX3 GPIF clock test
Test results: 29801; 33557; 37313 - PASSED
->Si5351C test
CLK0: 17554 / 17554 - PASSED
CLK1: 17554 / 17554 - PASSED
CLK2: 17554 / 17554 - PASSED
CLK3: 17554 / 17554 - PASSED
CLK4: 17554 / 17554 - PASSED
CLK5: 17554 / 17554 - PASSED
CLK6: 17554 / 17554 - PASSED
->ADF4002 Test
Result: 10 - PASSED
->VCTCXO test
Results : 5112976 (min); 5113092 (max) - PASSED
->Clock Network Test PASSED
[ FPGA EEPROM Test ]
->Read EEPROM
->Read data: 11 05 0F 11 05 0F 02
->FPGA EEPROM Test PASSED
[ LMS7002M Test ]
->Perform Registers Test
->External Reset line test
Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED
[ RF Loopback Test ]
Note: The test should be run without anything connected to RF ports
->Configure LMS
->Run Tests (TX_2-> LNA_L):
CH0 (SXR=800.0MHz, SXT=805.0MHz): Result:(-13.8 dBFS, 5.00 MHz) - PASSED
CH1 (SXR=800.0MHz, SXT=805.0MHz): Result:(-16.0 dBFS, 5.00 MHz) - PASSED
->Run Tests (TX_1 -> LNA_W):
CH0 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-13.7 dBFS, 5.00 MHz) - PASSED
CH1 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-17.3 dBFS, 5.00 MHz) - PASSED
->Run Tests (TX_2-> LNA_H):
CH0 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-15.8 dBFS, 5.00 MHz) - PASSED
CH1 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-29.1 dBFS, 5.00 MHz) - FAILED
->RF Loopback Test FAILED
=> Board tests FAILED <=
Elapsed time: 1.43 seconds
Is my LimeSDR faulty? Ofc, I didn’t connected anything to RF input/output port during test.