100kHz - 30MHz operation

Hi,

We are developing a high-end test-instrument, and half-way into the design, we discovered the LMS7002 which is close to ideal. Obviously we’ll have to make our own PCB and program the beast low-level.

I have tried reading the datasheet and the programmers guide, and I have a couple of questions about the 100kHz to 30MHz frequency range.

1. Am I right to say that the RX LimeLight digital interface run at 1/(2 * decimation ratio) times the ADC clock rate, and that the TX digital interface runs at 1/(2 * interpolation ratio) times the DAC clock rate?

2. Since I never need I/Q signal bandwidth larger than 250 kHz, can I set the ADC/DAC sample-rate to 5MHz and use a low-cost (i.e. slow) FPGA?

3. How do I get reception down to 100 kHz? From what I can gather, the lowest frequency the local oscillator for the analog RX Mixer can generate is 30 MHz, hence:

• I need to run the ADCs at 2 x 30 MHz (min) to sample the entire band from DC to 30MHz in one giant “chunk” of spectrum.

• I then need to use the TSP mixer, TSP decimator (by a factor of 32) and TSP FIR filters to down-mix again, to get the part of the DC to 30MHz chunk of spectrum that I need.

1. If my assumptions in 1 and 3 are right, I should also be able to use a slow FPGA for frequencies below 30MHz, because the decimation reduces the interface clock by a factor of 32?

Ronald

Hello @Ronald,

If you are talking about FCLK/MCLK frequencies, then this formula applies:
Fmclk/fclk = 2 * Fadc/dac / K,
Where:
Fmclk/fclk - MCLK or FCLK frequency at interface;
K - interpolation or decimation ratio.[quote=“Ronald, post:1, topic:1045”]
2) Since I never need I/Q signal bandwidth larger than 250 kHz, can I set the ADC/DAC sample-rate to 5MHz and use a low-cost (i.e. slow) FPGA?
[/quote]

Of course.

Generally yes, but it depends on what you want to implement.

Got it.

Thank you.

The PCB layout is underway

How do I get reception down to 100 kHz? From what I can gather, the lowest frequency the local oscillator for the analog RX Mixer can generate is 30 MHz, hence:

How to solve this problem