LimeSDR (original) self test failure

Hope someone can help. I have a LimeSDR USB (original one, full size) and I can’t seem to get it to work.

I’ve run the LimeQuickTest from within Linux and the RF Loopback test seems to be the point where it failed (although sometimes the LMS7002M Test fails). Here’s an example of the failure:

[ TESTING STARTED ]
->Start time: Mon Jun 27 21:30:02 2022
 
->Device: LimeSDR-USB, media=USB 3.0, module=FX3, addr=1d50:6108, serial=0009060A02430D1E, HW=4, GW=2.23
  Serial Number: 0009060A02430D1E
Chip temperature: 45 C
 
[ Clock Network Test ]
->FX3 GPIF clock test
  Test results: 38060; 41816; 45572 - PASSED
->Si5351C test
  CLK0: 17554 / 17554 - PASSED
  CLK1: 17554 / 17554 - PASSED
  CLK2: 17554 / 17554 - PASSED
  CLK3: 17554 / 17554 - PASSED
  CLK4: 17554 / 17554 - PASSED
  CLK5: 17554 / 17554 - PASSED
  CLK6: 17554 / 17554 - PASSED
->ADF4002 Test
  Result: 10 - PASSED
->VCTCXO test
  Results : 5112921 (min); 5113057 (max) - PASSED
->Clock Network Test PASSED
 
[ FPGA EEPROM Test ]
->Read EEPROM
->Read data: 11 02 16 11 02 16 02
->FPGA EEPROM Test PASSED
 
[ LMS7002M Test ]
->Perform Registers Test
->External Reset line test
  Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
  Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED
 
[ RF Loopback Test ]
Note: The test should be run without anything connected to RF ports
->Configure LMS
TuneVCO(CGEN) - failed to lock (cmphl!=0)
SetFrequencyCGEN(80 MHz) failed
TuneVCO(CGEN) - failed to lock (cmphl!=0)
SetFrequencyCGEN(491.52 MHz) failed
Failed to set sample rate
->RF Loopback Test FAILED
 
=> Board tests FAILED <=
 
Elapsed time: 1.15 seconds
 

I’m not a super strong LimeSDR user, in fact I only really ever have used it once, so I could really use some help on the next steps for troubleshooting. I searched and didn’t see any similar problems.

Any ideas?

Does it fail if you run the test when the board is cold?

CGEN VCO tuning fail might be hardware issue. LimeQuickTest failed on LimeSDR-USB