LimeSDR FPGA gateware version: 65535 rev 65535

Jean · 15 October 2020 05:44

This situation I have not been able to resolve.
I am sure that the enough external power supply(12V) and USB 3 cable have no damage because the other LimeSDR test is normal.
I try to update everything (FPGA, FX3 firmware, driver, press reset), but it hasn’t improve.
What else could I do to solve this happen?

-Quick Test-
->Start time: Mon Oct 12 15:19:25 2020

Gateware version mismatch!
Expected gateware version 2, revision 23
But found version 65535, revision 65535
Follow the FW and FPGA upgrade instructions:
http://wiki.myriadrf.org/Lime_Suite#Flashing_images
Or run update on the command line: LimeUtil --update

->Device: LimeSDR-USB, media=USB 3.0, module=FX3, serial=0009083401891D22, index=0, HW=127, GW=65535.65535
Serial Number: 0009083401891D22
Chip temperature: 45 C

[ Clock Network Test ]
->FX3 GPIF clock test
Test results: 65535; 65535; 65535 - FAILED
->FX3 GPIF clock test FAILED
->Si5351C test
CLK0: 65535 / 17554 - FAILED
CLK1: 65535 / 17554 - FAILED
CLK2: 65535 / 17554 - FAILED
CLK3: 65535 / 17554 - FAILED
CLK4: 65535 / 17554 - FAILED
CLK5: 65535 / 17554 - FAILED
CLK6: 65535 / 17554 - FAILED
FAILED
->ADF4002 Test
Result: 65535 - FAILED
FAILED
->VCTCXO test
Results : 4294967295 (min); 4294967295 (max) - FAILED
FAILED
->Clock Network Test FAILED

[ FPGA EEPROM Test ]
->Read EEPROM
->Read data: 14 09 11 14 0A 08 17
->FPGA EEPROM Test PASSED

[ LMS7002M Test ]
->Perform Registers Test
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed
RegistersTest() failed
->LMS7002M Test FAILED

[ RF Loopback Test ]
Note: The test should be run without anything connected to RF ports
->Configure LMS
TuneVCO(CGEN) - failed to lock (cmphl!=3)
SetFrequencyCGEN(80 MHz) failed
TuneVCO(CGEN) - failed to lock (cmphl!=3)
SetFrequencyCGEN(491.52 MHz) failed
Failed to set sample rate
->RF Loopback Test FAILED

=> Board tests FAILED <=

Elapsed time: 1.10 seconds

Zack · 15 October 2020 06:19

Hi @Jean,

What LED activity do you see?

Jean · 15 October 2020 09:06

The LED activity is the same as normal board.
FX3, BOOT : yellow
FPGA1,2 : Red (flashing)

Zack · 15 October 2020 10:16

There are no yellow LEDs on LimeSDR-USB board. Green maybe?

Both FPGA1 and FPGA2 LEDs are flashing? If this is what you mean then quite strange, while there is no FPGA2 flash functionality.

Jean · 15 October 2020 10:22

Sorry, they are green, and FPGA1 is flashing.

Jean · 20 October 2020 05:20

FX3, BOOT : Green light
FPGA1 : Red and green (flashing)

Salik007 · 31 July 2024 05:28

I am also facing same issue and LED status is also same mentioned in above reply.