I bought a LimeSDR two days ago, and when I took it to the test, I found that when the USB3.0 was connected, the self-test can be all passed, but after a few minutes (without any operation), the self-test failed due to heating, and the value is more than -60 dBFS, it became fine again after I use the fan to keep blowing it.
Was this condition normal?
管理员: C:Windows\system32\cmd.exe
C
X
一>Clock Network Test PASSED
FPGA EEPROM Test ]
Read EEPROH
Read data:13021A13031A 05
FPGA EEPROM Test PASSED
LMS7002M Test]
一>Perform Registers Test
External Reset line test
Reg 0x20: Write va1ue 0xFFFD, Read value 0xFFFD
Reg 0x20: value after reset 0xOFFFF
L HS7002M Test PASSED
RF Loopback Test
Note: The test should be run wi thout anything connected to RF ports
Configure LM
Run Tests (TX 2-> LNA L):
CHO (SXR=800. OMHz, SXT=805. OMHz): Result:(-14. 7 dBFS, 5.00 MHz) - PASSED
CH1 (SXR=800. 0MHz，SXT=805. OKHz) : Result: (-17.0 dBFS, 5. 00 ]MHz) - PASSED
Run Tests (TX 1 →
NA V):
CHO (SXR= 1800.0tHz，SXT=1805. OMHz): Result:(-15.8 dBFS, 5.00 MHz) - PASSED
CH1 (SXR= 1800. OKHz, SXT=1805. 0KHz): Result: (-18.3 dBFS, 5.00 MHz) - PASSED
Run Tests (TX 2-> LNA H)
CHO (SXR=2500. OKHz, SXT =2505.0KHz) :
Result:(-20.0 dBFS, -14. 56 MHz) - FAILED
CH1 (SXR=2500. OKHz, SXT=2505. OKHz): Result:(-25.0 dBFS, -14. 57 MHz) - FAILED
RF
Loopback Test FAILED
=> Board tests FAILED <=
E1apsed time: 3. 78 seconds
C: \Users \Admini strator> “D: \Program Files PothosSDR\bin\LimeQui ckTest. exe”
TESTING STARTED
->Start time: Wed Mlay 6 22:09:59 2020
Device: LimeSDR-USB, media=USB 2. 0, module=FX3, serial =0009081C05C3071F， index=0
Warning: USB3 not available
Serial Number: 000908 1C05C3071F
[ Clock Network Test
->FX3 GPIF clock test
Test results: 50274; 54030; 57786 - PASSED
Si 5351C test
CLK0: 17554 / 17554一PASSED
CI K1:
17554 / 17554 - PASSED
CLK2: 17554 / 17554 - PASSED
CLK3: 17554 / 17554 - PASSED
CLK4: 17554 / 17554 - PASSED
CLK5: 17554 / 17554 - PASSED
CLK6: 17554 I 17554
PASSED
ADF 4002 Tes
Result: 10 - PASSED
WCTCXO test
Results : 5112953 (min); 5113093 (max) - PASSED
C1ock Network Test PASSED
FPGA EEPROM Test]
Read EEPROM
->Read data:13021A13031A05
->FPGA EEPROM Test PASSED
LMS7002M Test]
->Perform Registers Test
External Reset 1ine test
Reg 0x20: Write va1ue 0xFFFD, Read value 0xFFFD
Reg 0x20: value after reset 0xOFFFF
L HS7002M Test PASSED
RF Loopback Test
Note: The test should be run wi thout anything connected to RF ports
Configure LMS
Run Tests (TX_ 2-> LNA L):
CHO (SXR=800. OMHz, SXT=805. 0MHz): Result:(-14. 7 dBFS，5.00 MHz) - PASSED
CH1 (SXR=800. 0MHz，SXT=805. OKHz) : Result: (-16.7 dBFS, 5. 00 ]MHz) - PASSED
Run Tests (TX 1 →
NA V):
CHO (SXR=1800. 0KHz, SXT=1805. OMHz): Result:(-15. 9 dBFS, 5.00 MHz) - PASSED
CH1 (SXR= 1800. OKHz, SXT=1805. 0KHz): Result: (-19. 4 dBFS, 5.00 MHz) - PASSED
Run Tests (TX 2-> LNA H)
CHO (SXR=2500. OKHz, SXT =2505.0KHz) :Result:(-65.9 dBFS, 19. 04 MHz) - FAILED
CH1 (SXR-2500. OKHz, SXT=2505. ORHz): Result: (-68.2 dBFS, -5. 49 ]KHz) - FAILED
RF Loopback Test FAILED
=> Board tests FAILED <=
E1apsed time: 3. 79 seconds