Lime SDR MIni V2 failing test

I have read several of the posts about the RF Loopback test failing, but none of them seem to propose a solution.

I have connected Antennas to the ports but still I get failure. ./LimeQuickTest

[ TESTING STARTED ]

->Start time: Tue Sep 10 19:24:33 2024

->LimeSuite version: 22.09.0-ge829d3ed

->Device: LimeSDR Mini, media=USB 3.0, module=FT601, addr=24607:1027, serial=1D40E13C0638D2, HW=2, GW=1.30

Serial Number: 1D40E13C0638D2

Chip temperature: 30 C

[ Clock Network Test ]

->REF clock test

Test results: 45490; 58687; 6348 - PASSED

->VCTCXO test

Results : 6711022 (min); 6711189 (max) - PASSED

->Clock Network Test PASSED

[ FPGA EEPROM Test ]

->Read EEPROM

->Read data: 12 06 1B 12 06 1B 03

->FPGA EEPROM Test PASSED

[ LMS7002M Test ]

->Perform Registers Test

->External Reset line test

Reg 0x20: Write value 0xFFFD, Read value 0xFFFD

Reg 0x20: value after reset 0x0FFFF

->LMS7002M Test PASSED

[ RF Loopback Test ]

->Configure LMS

->Run Tests (TX_2 → LNA_W):

CH0 (SXR=1000.0MHz, SXT=1005.0MHz): Result:(-19.7 dBFS, 5.00 MHz) - PASSED

->Run Tests (TX_1 → LNA_H):

CH0 (SXR=2100.0MHz, SXT=2105.0MHz): Result:(-26.7 dBFS, 5.00 MHz) - FAILED

->RF Loopback Test FAILED

=> Board tests FAILED <=

Elapsed time: 2.65 seconds

You are using “LimeSuite version: 22.09.0-ge829d3ed”. Update to a latest version, it has changes specific for LimeSDR Mini v2.
like: added LimeQuickTest v2 support · myriadrf/LimeSuite@475964c · GitHub
changed RF test tolerance · myriadrf/LimeSuite@abc28c0 · GitHub
mini v2: fix #393 always enable adc, dac clocks · myriadrf/LimeSuite@d676b49 · GitHub

[ TESTING STARTED ]

->Start time: Wed Sep 11 09:08:11 2024

->LimeSuite version: 23.11.0-g9dce3b6a

Exiting libusb_claim_interface:1803 r 0

->Device: LimeSDR Mini, media=USB 3.0, module=FT601, addr=24607:1027, serial=1D40E13C0638D2, HW=2, GW=1.30

Serial Number: 1D40E13C0638D2

Chip temperature: 18 C

[ Clock Network Test ]

->REF clock test

Test results: 64424; 12085; 25283 - PASSED

->VCTCXO test

Results : 6710977 (min); 6711145 (max) - PASSED

->Clock Network Test PASSED

[ FPGA EEPROM Test ]

->Read EEPROM

->Read data: 12 06 1B 12 06 1B 03

->FPGA EEPROM Test PASSED

[ LMS7002M Test ]

->Perform Registers Test

->External Reset line test

Reg 0x20: Write value 0xFFFD, Read value 0xFFFD

Reg 0x20: value after reset 0x0FFFF

->LMS7002M Test PASSED

[ RF Loopback Test ]

->Configure LMS

->Run Tests (TX_2 → LNA_W):

CH0 (SXR=1000.0MHz, SXT=1005.0MHz): Result:(-19.1 dBFS, 5.00 MHz) - PASSED

->Run Tests (TX_1 → LNA_H):

CH0 (SXR=2100.0MHz, SXT=2105.0MHz): Result:(-21.6 dBFS, 5.00 MHz) - PASSED

->RF Loopback Test PASSED

=> Board tests PASSED <=

Elapsed time: 2.64 seconds

Connected to [LimeSDR Mini [USB 3.0] 1D40E13C0638D2]

–2024-09-11 09:08:28-- https://downloads.myriadrf.org/project/limesuite/23.11/LimeSDR-Mini_HW_1.2_r1.30.rpd
Resolving downloads.myriadrf.org (downloads.myriadrf.org)… 165.227.233.124, 2a03:b0c0:1:d0::eed:8001
Connecting to downloads.myriadrf.org (downloads.myriadrf.org)|165.227.233.124|:443… connected.
HTTP request sent, awaiting response… 200 OK
Length: 577536 (564K) [application/octet-stream]
Saving to: ‘/home/sdr/.local/share/LimeSuite/images/23.11/LimeSDR-Mini_HW_1.2_r1.30.rpd’

/home/sdr/.local/share/LimeSui 100%[===================================================>] 564.00K 897KB/s in 0.6s

2024-09-11 09:08:29 (897 KB/s) - ‘/home/sdr/.local/share/LimeSuite/images/23.11/LimeSDR-Mini_HW_1.2_r1.30.rpd’ saved [577536/577536]

Existing gateware is same as update (1.30)

Programming update complete!

Thank you