Dual XTRX Deterministic Coherent Operation

i believe you should get constant phase offset across multiple xtrxs, but that phase offset would be random from startup to startup and LO change. both xtrxs are fed a common clock, but that clock runs an independent fractional-n pll on each xtrx and thus causes a different phase from startup-to-startup and LO change, from my understanding

do you have plots of the phase between channels like in this post Expected phase error when synchronizing multiple xtrxs [phase coherent processing] ?