Phase Synchronous Dual Channel RX

I’ve been researching the LimeSDR as a possible means of capturing two signal simultaneously. Here is my problem: I’d like to capture an RF signal with a center around 433 MHz while simultaneously capturing a DC signal.

The DC signal is a GPS 1 PPS signal that I will use to timestamp the 433 MHz signal. Because I want to take advantage of the GPS time signal’s precision, I need to simultaneously capture both of these signals with a jitter of 10 ns or less.

While looking through the API for C (which is my development platform). I found the dual RXTX example for using multiple channels on the Lime SDR. However, since you have to poll each channel separately this introduces a software delay which I would like to avoid.

My question: is this possible with the Lime SDR? I know there is MIMO channel alignment functionality, but I’m unsure of how to utilize it. If this is possible, if you could point me to any resources that would help me in my research, I would be very grateful.

There is timestamping support in the Lime Suite API and SDR FPGA, as this is required for applications such as cellular. If you were to use a LimeNET Micro this integrates a GPS receiver also, but I can’t remember if the PPS would/could be used in timestamping, or if it just disciplines the oscillator. You can find clock distribution details here:

https://wiki.myriadrf.org/LimeNET-Micro_v2.1_hardware_description#Clock_Distribution

May be you would need custom gateware, but PPS > FPGA and timestamping there would seem better than trying to align two channels and use one for PPS. @Zack may be able to advise further.

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Hey @andrewback, thank you for the quick response.

The LimeNET Micro’s GPS seems like a very promising option for
timestamping. I looked into the datasheet for it and found that its 1PPS
signal has a precision of 30 ns RMS. It looks like the 1PPS signal from
the GPS is routed into the FPGA as GNSS_TPULSE at J10. How is this
signal acquired by the FPGA, and is the resulting timestamp that is
applied to samples also accurate to 30ns RMS? Maybe @Zack could
elaborate on this?

Another promising option would be to use the GPS to discipline the
VCOCXO, and then use a combination of the VCOCXO signal (divided down to
synthesize a 1PPS signal in the FPGA) and the GNSS_TPULSE to provide
global phase, in an effort to effectively filter the 1PPS signal. This
would benefit from the long term stability of GPS, but the low jitter of
the local oscillator.

At any rate, are either of these approaches currently available in the
gateware? I’d like to avoid running custom gateware but I will if there
is no other option.

Hi @eldaromer,

Unfortunately these are not implemented in the gateware yet.