Calibration failure and RSSI problems

tony.bigbee · 24 July 2017 07:41

Hi,

I am programmatically trying to measure RSSI for RX A+B using LNA_L and have read Ricardas’ postings on RSSI measurement. I’ve read that each channel should be able to have its own frequency, but have been unable to accomplish this. Also, although the RSSI values are changing (I’m measuring them every 100 msec and averaging 2^12 samples), when I apply an external -35 dBm to either LNA_L antenna port, no appreciable change occurs to either RSSI level. I have just downloaded and rebuilt the LimeSuite shared lib from git and have run LimeUtil --update. Below is the output I’m generating so that you can see various parameters . I’m using the LMS7002 and IConnection classes to set parameters and make SPI changes.

One thing I see is that RX Calibration fails:
SelfCalibration error: MCU working too long 52

LimeSDR-USB, media=USB 3.0, module=STREAM, addr=1d50:6108, serial=0009060A02431120
[INFO] Estimated reference clock 30.7195 MHz
[INFO] Selected reference clock 30.720 MHz
[INFO] LMS7002M cache /Users/abigbee/.limesuite/LMS7002M_cache_values.db
Set Active Channel ChA
Reading registers
Refclk 30.7 (MHz)
Frequency CGEN 371.715 (MHz)
Sample rate 46.464 (Msps)
LNA 30.0 (db)
TIA 12.0 (db)
PGA -1.0 (db)
Vtemp 0x00AB, Vptat 0x00A9, Vdiff = -1.80, temp= 38.697
Temperature 38.7 (C)
HBD_OVR_RXTSP 0 [decimation ratio 2^(1+0) = 2]
AGC Open Loop Gain K 0

Writing registers
LNA Gain set to → 10.0
Path RFE → PATH_RFE_LNAL
SetFReqencyCGEN vco found 2.88E9
6 DIV_OUTCH_CGEN
92 0.0 0 NT_SDM_CGEN-intpart dFrac gFrac
3.072E7 ← GetReferenceClk_SX
9.292875E7 ← GetReferenceClk_TSP
2 TuneVCO VCO_CGEN results in: TuneVCO(SXR) - VCO too low
3 SetFrequencySX results in: TuneVCO(SXR) - VCO too low
4 SetFrequencyCGEN results in: SetFrequencyCGEN(240 MHz) failed:
INT: 92 FRAC: 786432 DIV_OUTCH_CGEN: 5
VCO: 2880 MHz RefClk: 30.72 MHz
TuneVCO(CGEN) - VCO too high
Sample rate → 30.000 (Msps)
Rereading registers
Path RFE PATH_RFE_LNAL
Frequency CGEN 240.000 (MHz)
Sample rate 30.000 (MHz)
CGEN FREQ 240.0 (MHz), resulting sample rate is 30.000 (Msps)
HBD_OVR_RXTSP 0 [decimation ratio 2^(1+0) = 2]
Frequency CGEN 240.000 (MHz)
Sample rate 30.000 (MHz, CGEN/4/decimation ratio)
NCO Frequency 25.826 (MHz)
Path RFE PATH_RFE_LNAL
Set Active Channel ChB
Reading registers
Refclk 30.7 (MHz)
Frequency CGEN 240.000 (MHz)
Sample rate 30.000 (Msps)
LNA 30.0 (db)
TIA 12.0 (db)
PGA -1.0 (db)
Vtemp 0x00AB, Vptat 0x00A9, Vdiff = -1.80, temp= 38.697
Temperature 38.7 (C)
HBD_OVR_RXTSP 0 [decimation ratio 2^(1+0) = 2]
AGC Open Loop Gain K 0

Writing registers
LNA Gain set to → 10.0
Path RFE → PATH_RFE_LNAL
SetFReqencyCGEN vco found 2.88E9
6 DIV_OUTCH_CGEN
92 0.0 0 NT_SDM_CGEN-intpart dFrac gFrac
3.072E7 ← GetReferenceClk_SX
6.0E7 ← GetReferenceClk_TSP
2 TuneVCO VCO_CGEN results in: TuneVCO(SXR) - VCO too low
3 SetFrequencySX results in: TuneVCO(SXR) - VCO too low
4 SetFrequencyCGEN results in: SetFrequencyCGEN(240 MHz) failed:
INT: 92 FRAC: 786432 DIV_OUTCH_CGEN: 5
VCO: 2880 MHz RefClk: 30.72 MHz
TuneVCO(CGEN) - VCO too high
Sample rate → 30.000 (Msps)
Rereading registers
Path RFE PATH_RFE_LNAL
Frequency CGEN 240.000 (MHz)
Sample rate 30.000 (MHz)
CGEN FREQ 240.0 (MHz), resulting sample rate is 30.000 (Msps)
HBD_OVR_RXTSP 0 [decimation ratio 2^(1+0) = 2]
Frequency CGEN 240.000 (MHz)
Sample rate 30.000 (MHz, CGEN/4/decimation ratio)
NCO Frequency 0.000 (MHz)
Path RFE PATH_RFE_LNAL
############################################################
Rx calibration using RSSI INTERNAL ON BOARD loopback
Rx ch.B @ 418.05 MHz, BW: 60 MHz, RF input: LNAL, PGA: 11, LNA: 4, TIA: 3
Performed by: MCU

MCU algorithm time: 0 ms
Current MCU firmware: 3, DC/IQ calibration full
MCU Ref. clock: 30.72 MHz
MCU algorithm time: 92 ms
SelfCalibration error: MCU working too long 52
A sample rate → 30.00
A SX Frequency → 418.05 (MHz)
B sample rate → 30.00
B SX Frequency → 418.05 (MHz)

channel level dbfs channel level dbfs
A 32 -68.99 B 32 -68.99
A 32 -68.99 B 32 -68.99
A 32 -68.99 B 31 -69.27
A 32 -68.99 B 31 -69.27
A 32 -68.99 B 32 -68.99
A 33 -68.72 B 32 -68.99
A 32 -68.99 B 31 -69.27
A 32 -68.99 B 32 -68.99
A 32 -68.99 B 32 -68.99
A 32 -68.99 B 31 -69.27
A 32 -68.99 B 31 -69.27
A 33 -68.72 B 31 -69.27
A 32 -68.99 B 32 -68.99

TegwynTwmfatt · 24 July 2017 08:22

I would also like to know a bit more about how the RSSI works

tony.bigbee · 27 July 2017 03:11

I decided to drop back to the singleRX example to troubleshoot. After updating to the latest LimeSuite code again and running LimeUtil --update, I see a lot of libusb errors while running singleRX.

LimeUtil --info
######################################################

LimeSuite information summary

######################################################

Version information:
Library version: v17.07.0-unknown
Build timestamp: 2017-07-24
Interface version: v2017.6.0
Binary interface: 17.07-1

Devices found: 1
0: LimeSDR-USB, media=USB 3.0, module=STREAM, addr=1d50:6108, serial=0009060A02431120

[INFO] Estimated reference clock 30.7195 MHz
[INFO] Selected reference clock 30.720 MHz
[INFO] LMS7002M cache /Users/abigbee/.limesuite/LMS7002M_cache_values.db
**TuneVCO module 1 (0-CGEN, 1-SXR, 2-SXT)
**TuneVCO module 1 (0-CGEN, 1-SXR, 2-SXT)
**TuneVCO module 1 (0-CGEN, 1-SXR, 2-SXT)

Center frequency: 408.05 MHz
Available antennae:
0: NONE
1: LNA_H
2: LNA_L
3: LNA_W
Automatically selected antenna: 1: LNA_H
Manually selected antenna: 3: LNA_W
**TuneVCO module 0 (0-CGEN, 1-SXR, 2-SXT)
libusb: warning [darwin_abort_transfers] aborting all transactions on interface 0 pipe 2
libusb: warning [darwin_abort_transfers] aborting all transactions on interface 0 pipe 2
libusb: warning [darwin_abort_transfers] aborting all transactions on interface 0 pipe 2

Host interface sample rate: 8 MHz
RF ADC sample rate: 64MHz

RX LPF bandwitdh range: 1.4 - 130 MHz

MCU algorithm time: 10 ms
MCU Ref. clock: 30.72 MHz
MCU algorithm time: 181 ms
LPF bandwidth: 8 MHz

Normalized RX Gain: 0.7
############################################################
Rx calibration using RSSI INTERNAL ON BOARD loopback
Rx ch.A @ 408.05 MHz, BW: 8 MHz, RF input: LNAW, PGA: 10, LNA: 15, TIA: 3
Performed by: MCU

Current MCU firmware: 3, DC/IQ calibration full
MCU algorithm time: 0 ms
MCU Ref. clock: 30.72 MHz
MCU algorithm time: 288 ms
libusb: warning [darwin_transfer_status] transfer error: timed out
libusb: warning [darwin_transfer_status] transfer error: timed out
RX rate: 1.38103 MB/s
RX fifo: 12%

tony.bigbee · 30 July 2017 21:43

Now successfully measuring A + B RSSI simultaneously. I’m still not able to set independent frequencies for each. What I have learned:

The EnableChannel function in LMS7002m.cpp turns off RSSI / AGC.

github.com

myriadrf/LimeSuite/blob/225afe41e0b3d5d2971a90da91a25ffc6e5ddd53/src/lms7002m/LMS7002M.cpp#L236


      
          
          size_t LMS7002M::GetActiveChannelIndex(bool fromChip)
          {
              switch (this->GetActiveChannel(fromChip))
              {
              case ChB: return mdevIndex*2 + 1;
              default: return mdevIndex*2 + 0;
              }
          }
          
          int LMS7002M::EnableChannel(const bool isTx, const bool enable)
          {
              Channel ch = this->GetActiveChannel();
          
              //--- LML ---
              if (ch == ChA)
              {
                  if (isTx) this->Modify_SPI_Reg_bits(LMS7param(TXEN_A), enable?1:0);
                  else      this->Modify_SPI_Reg_bits(LMS7param(RXEN_A), enable?1:0);
              }
              else

To enable RSSI, there are at least two calls that must be performed after calling EnableChannel:

dev.Modify_SPI_Reg_bits(lms.getLMS7_AGC_BYP_RXTSP(), 0); // do not bypass AGC
dev.Modify_SPI_Reg_bits(lms.getLMS7_AGC_MODE_RXTSP(), 1);//1 = RSSI, 2= Bypass

Next, if you attempt to set the SX frequency or CGEN frequency and an error results in the VCO being too low or high, frequent libusb connection reports will ensue (at least on MacOS).

Finally, some basic tests of LNAW and LNAL @ 408 MHz using a stock board of RSSI levels indicates that the shorter the window/averaging, the greater the variability (as measured by standard deviation). Shorter windows also result in lower absolute RSSI levels. Windows range from 2048 samples to 16384 2^(7+n):

dev.Modify_SPI_Reg_bits(lms.getLMS7_AGC_AVG_RXTSP(),n);

Calibration failure and RSSI problems

LimeSuite information summary

Normalized RX Gain: 0.7 ############################################################ Rx calibration using RSSI INTERNAL ON BOARD loopback Rx ch.A @ 408.05 MHz, BW: 8 MHz, RF input: LNAW, PGA: 10, LNA: 15, TIA: 3 Performed by: MCU

Normalized RX Gain: 0.7
############################################################
Rx calibration using RSSI INTERNAL ON BOARD loopback
Rx ch.A @ 408.05 MHz, BW: 8 MHz, RF input: LNAW, PGA: 10, LNA: 15, TIA: 3
Performed by: MCU