Max Bandwidth of Dual RX

[mzs]

I don’t know, but FYI some of the information above is out of date. This thread has more current information:

Case dimensions? RF switching time? Bandwidth>60MHz?

Xiillybus FPGA code limits throughput to 400 MB/s per direction (Cyclone IV PCIe x4, http://xillybus.com/pcie-download). When using TX and RX the maximum what I am able to get in LimeSuite on LimeSDR-PCIE is ~370 MB/s in each direction. On LimeSDR-USB it is ~180-190 MB/s in each direction.