We are making a custom board for FDD communication. We plan to have a single output from the on-board oscillator conneced to both xoscin_tx and xoscin_rx. Will that be ok or do they have to be fed from separate sources (or through a clock buffer).
On Pg 88 of the LMS7002 SPI Regs document where it shows that it is possible to internally connect the xoscin_tx pin input to the receiver PLL also.In that case, xoscin_rx can be left disconnected (or do we need to pull it high or low or connect a capacitor to ground?).
The LimeSDR/Mini boards have the xoscin_tx, rx supplied at 1.8V logic levels. What is the reason for doing this? Will a lower voltage produce lower PLL spurs? Can this be run at 2.5V?
Thank you for your help in advance,