Hi All,
I have some Communication IP’s written for Xilinx IP’s (BPSK demodulator). I estimate that the Altera FPGA on the LIMESDR (USB and PCIe) has not enough space for such an implementation.
Is there a board around which has the LimeMicro ASIC+ Xilinx FPGA on it?
Alternatively as the Communication IP’s just need I&Q and CLK(Sample Rate) is there a way to get I&Q out of the LIMESDR board?
The only solution I know of would be to use the LMS7002M EVB (UNITE) board — which has an FMC interface — plugged into an appropriate Xilinx FPGA development board.