Hi Lime team,
I’m connecting a Raspberry Pi Compute Module 5 (CM5) to a LimeSDR XTRX using the open-source LimePSB-RP/CM_V1.4 schematic. While reviewing the schematic against the LimeSDR XTRX mPCIe documentation LimePSB RPCM v1.4 Board — LimePSB RPCM Boards 23.01 documentation, and I came across a few points that could use clarification. There seems to be a few inconsistencies.
Pin 7 – CLKREQ#
• Schematic: Connected to a net labeled PCIe_LCK_nREQ.
• Documentation: Indicates CLKREQ# should be pulled low (typically with a 330Ω resistor) to enable PCIe clocking. The Lime XTRX documentation says it is Not connected but the schematic shows it connected.
• Question: Does the XTRX pull this line low internally, or do I need to add an external pull-down to enable the clock on the CM5?
Pin 17 – TDD_GPIO3_N (TX Enable)
Documentation: No connection
• Schematic: Routed to an FPGA on the carrier board.
• Question: Does this pin need to be driven high or low to enable transmission from the XTRX, or can it safely be left unconnected? Is it an input or an output of the XTRX?
Pin 19 – CLK_IN (External 3.3V Clock Input)
• Schematic: Input from the external clock system.
• Question: Is this input required in all use cases, or can it remain unconnected during normal operation?
Pins 11 and 13 – REFCLK- / REFCLK+
• Schematic: Connected directly from the CM5 to the XTRX.
• Note: The CM5 datasheet notes that these signals are “no longer capacitively coupled.”
• Question: Does this mean I now need to add external AC-coupling capacitors, or does the CM5 include them and I should avoid adding capacitors? I think the wording is slightly confusing.
Pins 23 and 25 – RPI_PCIE_RX_P / RPI_PCIE_RX_N
Schematic: Connected directly from the CM5 to the XTRX labeled as RX but Schematic labels the them as TX on the XTRX.
• Question: It appears RX should go to TX but the exact paring of which RX to which TX is not completely clear. I assume the schematic is correct in this scenario.
Pin 28 – 1.5V
• Schematic: Connected to a 1.5V regulator.
• Documentation: Indicates this pin is not connected but is a default for mPCIE.
• Question: Is this input required by the LimeSDR XTRX, or is it safe to leave it floating and skip the 1.5V supply if I am not planning on using the mPCIE for other things?
Pin 30 & 32 – SMB_DATA & SMB_CLK (I2C Data & Clock)
• Schematic: Connected to GPIOs on the Raspberry Pi CM5, seemingly used as an I2C bus.
• Question: Does the LimeSDR XTRX require I2C (or SMBus) communication for basic functionality, or are these optional features?
Pin 31 & 33 – PETn0 (PCIe RX-)
• Schematic: Connected to Raspberry Pi PCIe TX- (Pin24). Also in the “Clock diagram V1.4” Pin 31 PCIE_PETn0 appears to be connected to a series of switches and to the FPGA.
• Documentation: Shows this pin as RX- on the LimeSDR side and connecting to pin 28 on the PI.
• Question: Is this a mistake in the schematic, or is there an inconsistency in the documentation? Where should it be connected? I assume RX on PCIE needs to go to TX on the RPI?
Pin 33 – PETp0 (PCIe RX+)
• Schematic: Connected to Raspberry Pi PCIe TX+.
• Documentation: Shows this pin as RX+ on the LimeSDR side.
• Question: Same as Pin 31 — is this reversed in the schematic, or is the documentation inaccurate?
Thanks in advance for your help. I just want to confirm these details before committing to hardware.