Reference CLock 30,72 Mhz

Projects Reference Development Kit
1

Hello,

I’m working on the my Myriad-RF with the LMS6002DF, digital interface board and the FPGA DEO-Nano development kit,

my SPI communication is selected via the FPGA option

in my digital interface i don’t have a TXCO to generate a CLK_TCXO clock, and i don’t know if my SI5356 generate me the 30,72 Mhz frequency to my myriad board.

when i test my register is not passing 100%: "Some problems with VTUNE registers :

Testing TxRF SPI, Mask 0xAA:

Module test with this pattern is OK.

Testing TxRF SPI, Mask 0x55:

Module test with this pattern is OK.

Testing RxFE SPI, Mask 0xAA:

Module test with this pattern is OK.

Testing RxFE SPI, Mask 0x55:

Module test with this pattern is OK.

Testing RxLPF SPI, Mask 0xAA:

Module test with this pattern is OK.

Testing RxLPF SPI, Mask 0x55:

Module test with this pattern is OK.

Testing RxLPF SPI, Mask 0xAA:

Module test with this pattern is OK.

Testing RxLPF SPI, Mask 0x55:

Module test with this pattern is OK.

Testing TxLPF SPI, Mask 0xAA:

Module test with this pattern is OK.

Testing TxLPF SPI, Mask 0x55:

Module test with this pattern is OK.

Testing TxPLL SPI, Mask 0xAA:

Module test with this pattern is OK.

Testing TxPLL SPI, Mask 0x55:

Module test with this pattern is OK.

Testing RxPLL SPI, Mask 0xAA:

Module test with this pattern is OK.

Testing RxPLL SPI, Mask 0x55:

Module test with this pattern is OK.

Testing Top SPI, Mask 0xAA:

Module test with this pattern is OK.

Testing Top SPI, Mask 0x55:

Module test with this pattern is OK.

Testing TxPLL VTUNE registers:

Some problems with VTUNE registers:

VTUNE_H (should be/acctual): 1/1;

VTUNE_H (should be/acctual): 0/1;

VTUNE_L (should be/acctual): 1/1;

VTUNE_L (should be/acctual): 0/1;

Testing RxPLL VTUNE registers:

Some problems with VTUNE registers:

VTUNE_H (should be/acctual): 1/1;

VTUNE_H (should be/acctual): 0/1;

VTUNE_L (should be/acctual): 1/1;

VTUNE_L (should be/acctual): 0/1;

when i configures my transmitter in a 2,4 GHz output frequency, and i connect the TX output to spectrum analyzer, the transmitter frequency is not the same as the programmed value
Tips or ideas are greatly appreciated.

Thank you!

Amina
<img src="/uploads/default/13/32799a085fc5eacb.jpg" width=“666” height="500

2

Hello Amina,

If you are working with DEO-Nano board please make sure that on board clock generator is programmed to supply the reference clock (30.72 MHz) to LMS6002D PLL. If there is an option to bypass clock generator and supply it directly from XO also should help.

Best,
Rich

3

Hello Rich,
Thank you for your answer, I finally welded in place of TXCO a wire connected to an external clock in 30,72 frequency.
My registrar is passing 100% and my transmitter frequency is now the same as the programmed value.
I have another question:
I want to check the receiver side.
In the development kitt it is written that I must input a sine wave at -60dBm into the reference board antenna connector (connector J2), how can I do that? should I have a transceiver to generate me the sin wave.
I must connect an oscilloscope to J3.20 or J3.18 on the design kit, but I don’t find any J3.20 or J3.10 connector

Best,

Amina

4

Hello Amina,

We usually use the signal generator, but you can use the LMS6002D Tx output as well. The output power from TX out port can be significantly higher and might overload receiver. You may need to reduce Tx or receiver gain.

J3 connector belongs to LMS6002D evaluation board. I guess you are using Myriad RF board. To get aces to Analog RX outputs connect probe to X5.1, X5.2, X5.4, X5.5. X5.3 is a GND pin.

Best,
Rich