PLL Frequency tuning algorithm

Hi All,

How to select VCOCAP code for the desired frequency?



LMS6002D VCOCAP code have to be tuned when you change frequency. VCO Comparators are implemented on chip to monitor VCO Tune voltage. This gives a logic 0’s when VCOCAP code value is correct. Calibration algorithm is described in “MF-LMS6002Dr2-Programming and Calibration Guide-1.1r1.doc" , chapter “4.6 VCOCAP Code Selection Algorithm”, page 41.

Link to document:



Hello, maybe somebody of you knows why TXLPF, RXLPF, and RXVGA2 calibration routines return DC_LOC value of 0 or 7? Thanks

hey Stefan,

sometimes DC_LOCK is not reliable indication. The reason for this is the fact that DC

offset compensation DAC step size is smaller around 0V DC which corresponds to DAC code 31dec meaning “no need to compensate, DC level is good”.

Under this condition, comparator responds as:

UP, UP, UP corresponding to DC_lock = “111” or

DOWN, DOWN, DOWN corresponding to DC_lock = “000” instead of

UP, DOWN, UP, DOWN, … corresponding to “1010…”

In this case DC_lock is not reliable indicator of success or failure of DC offset cancellation algorithm. We

suggest to use DC_REG_VAL instead of DC_LOCK as in the pseudo-code below.


dc_reg_val = read_DC_REG_VAL();