LimeSDR RXOUT and clock sync

Hi @Zack,
Thanks a lot for your quick reply !

You’re right, for the beginning, one LimeSDR board could be enough to measure if there’s a phase-shift between the two receivers. It really depends on the sampling frequency of the IQ signals. The idea is to be as precise as possible to detect nanoseconds of phase-shift.

Assuming I will use the LimeSDR for my project:

  1. Will it be possible to get the I/Q signals on the GPIOs (or some external pins) ?
  2. If yes, what will be the sampling rate of the I/Q signals at that stage ?

Regarding the last question: I read in another post (here) one of your reply saying that the ADC works at 80MHz :

“You have 4 ADCs running at 80MHz in parallel; this is 4 Samples * 80 MHz = 320 MSps (mega samples per second);”

  • If I get it correctly, that means the I and Q signals will be sampled at 80MHz by the IQADC. Is that correct ?
  • Cause in the LMS7002M datasheet, I read that the ADCs are running at 160MHz, am I missing something ?
  • Is there a way to increase the sampling rate ?
  • After the IQADC, is there any other re-sampling of the IQ signals ?

Thanks a lot for your help.