Latest Firmware for Streamer + EVB7 with Pothos support

Hi All,

I have the Streamer (v2r2) + EVB7 (using SPI from FPGA to control EVB7). Need to verify latest firmware revisions and also how to properly connect the board to Pothos using SDR source. See my Soapy response for the board below:

C:\Program Files\PothosSDR\bin>SoapySDRUtil.exe --probe=“driver=lime,module=STREAM”
######################################################

Soapy SDR – the SDR abstraction library

######################################################

Probe device driver=lime,module=STREAM
Win32; Microsoft Visual C++ version 14.0; Boost_106000; UHD_003.009.004-0-g2b5a88bb

[INFO] Make connection: ‘USB 3.0 (Stream)’

########################################################

!!! Warning: firmware version mismatch !!!

Expected firmware version 5, but found version 4

Follow the FW and FPGA upgrade instructions:

http://wiki.myriadrf.org/Lime_Suite#Flashing_images

########################################################

[INFO] Device name: Stream
[INFO] Reference: 30.72 MHz
[INFO] Init LMS7002M(0)
HOME variable is not set
LMS7002M values cache at C:\Users\apieroni\AppData\Local\Temp/.limesuite/LMS7002M_cache_values.db
[INFO] Ver=7, Rev=1, Mask=0
[INFO] LMS7002M calibration values caching Enable
[INFO] SoapyLMS7::setFrequency(Rx, 0, BB, 0 MHz)
[INFO] SoapyLMS7::setFrequency(Tx, 0, BB, 0 MHz)
[INFO] SoapyLMS7::setAntenna(Rx, 0, LNAL)
[INFO] SoapyLMS7::setAntenna(Tx, 0, BAND1)
[INFO] SoapyLMS7::setGain(Rx, 0, PGA, 0 dB)
[INFO] SoapyLMS7::setGain(Rx, 0, LNA, 0 dB)
[INFO] SoapyLMS7::setGain(Rx, 0, TIA, 0 dB)
[INFO] SoapyLMS7::setGain(Tx, 0, PAD, -50 dB)
[INFO] SoapyLMS7::setSampleRate(Rx, 0, 10 MHz), baseRate 20 MHz, factor 2
ConnectionSTREAM::ConfigureFPGA_PLL(tx=20MHz, rx=10MHz)
[INFO] SoapyLMS7::setSampleRate(Tx, 0, 10 MHz), baseRate 20 MHz, factor 2
ConnectionSTREAM::ConfigureFPGA_PLL(tx=10MHz, rx=10MHz)
[INFO] SoapyLMS7::setBandwidth(Rx, 0, 30 MHz)
[INFO] Rx Filter calibrated from cache
[INFO] SoapyLMS7::setBandwidth(Tx, 0, 30 MHz)
[INFO] Filter calibrated. Filter order-4th, filter bandwidth set to 30 MHz.Real pole 1st order filter set to 2.5 MHz. Preemphasis filter not active
[INFO] SoapyLMS7::setFrequency(Rx, 1, BB, 0 MHz)
[INFO] SoapyLMS7::setFrequency(Tx, 1, BB, 0 MHz)
[INFO] SoapyLMS7::setAntenna(Rx, 1, LNAL)
[INFO] SoapyLMS7::setAntenna(Tx, 1, BAND1)
[INFO] SoapyLMS7::setGain(Rx, 1, PGA, 0 dB)
[INFO] SoapyLMS7::setGain(Rx, 1, LNA, 0 dB)
[INFO] SoapyLMS7::setGain(Rx, 1, TIA, 0 dB)
[INFO] SoapyLMS7::setGain(Tx, 1, PAD, -50 dB)
[INFO] SoapyLMS7::setSampleRate(Rx, 1, 10 MHz), baseRate 20 MHz, factor 2
ConnectionSTREAM::ConfigureFPGA_PLL(tx=20MHz, rx=10MHz)
[INFO] SoapyLMS7::setSampleRate(Tx, 1, 10 MHz), baseRate 20 MHz, factor 2
ConnectionSTREAM::ConfigureFPGA_PLL(tx=10MHz, rx=10MHz)
[INFO] SoapyLMS7::setBandwidth(Rx, 1, 30 MHz)
[INFO] Rx Filter calibrated from cache
[INFO] SoapyLMS7::setBandwidth(Tx, 1, 30 MHz)
[INFO] Filter calibrated. Filter order-4th, filter bandwidth set to 30 MHz.Real pole 1st order filter set to 2.5 MHz. Preemphasis filter not active


– Device identification

driver=STREAM
hardware=Stream
boardSerialNumber=0x0
expansionName=UNKNOWN
firmwareVersion=4
hardwareVersion=3
protocolVersion=1


– Peripheral summary

Channels: 2 Rx, 2 Tx
Timestamps: YES
Sensors: clock_locked

In short, if you use the device arguments {“driver”:“lime”} and tell the block gain, frequency, and sample rate it should be usable. A more detailed explanation can be found here: https://github.com/pothosware/pothos-sdr/wiki/Tutorial#stream-parameters

However, my first concern is the compatibility of the current STREAM support and FPGA images. The LimeSuite has moved forward with the LimeSDR using the STREAM connection implementation and some things may have diverged, or a new FPGA image may need to be produced. I hope that someone from the team can comment.