What is the max limelight interface frequency? I see there was some fine tuning of the Xilinx FPGA drive parameters to increase limelight interface max speed, what is the speed that was acheived?
Tagging @VytautasB.
Hi @sdruser256,
Currently limelight is able to work with 122.88Mhz frequency on limelight interface. Take in mind that in order to work on such interface clock rate board requires cooling.
Thanks. How does this match with the “120 MSPS SISO / 90 MSPS MIMO” listed sample rate in the Specification section of Lime Microsystems | LimeSDR XTRX?
For 90 MSPS MIMO wouldn’t you need 90 * 2 = 180 MHz limelight frequency?
In this case specs are from LMS7002 ADC/DAC sampling rate perspective not from limelight interface. You have to take into account interpolation/decimation settings in TSP blocks.
In SISO mode interpolation/decimation is bypassed so in order to transfer 120MSPS you will need 120MHz interface clock.
In MIMO mode interpolation/decimation=2 To transfer data from ADC/DAC running at 90MSPS limelight interface clock will be 90MHz.
Regards,
Vytautas