XTRX GW firmware PCIe Interface

I found the litePCIe interface of XTRX GW firmware used almost all BRAMs.
Xilinx XDMA PCIe interface uses much less BRAMs.
We’d like to use XTRX for some signal processing and will need some BRAMs.
Is it possible to use Xilinx XDMA instead of LitePCIe for XTRX?
Will LimeSuite support Xilinx XDMA PCIe interface?
Can LitePCIe be configured to use less BRAMs?
Thanks in advanced for advices.

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I imagine it would be possible to use Xilinx IP instead.

I suspect not and if you start modifying the gateware, you need to be in a position to support this and any required changes to Lime Suite — it’s not something we could be expected to support.

Tagging @VytautasB and @ricardas for further comment on the practicalities.

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From software side, there is no point of adding and maintaining additional interfaces if we don’t have devices that utilize it.

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Hi @dgs0001,

I found the litePCIe interface of XTRX GW firmware used almost all BRAMs.
Xilinx XDMA PCIe interface uses much less BRAMs.

Take in mind that probably you are comparing bare Xilinx XDMA PCIe IP and specifically configured litePCIe core in current LimeSDR-XTRX gateware to suit various application needs.

Is it possible to use Xilinx XDMA instead of LitePCIe for XTRX?
Will LimeSuite support Xilinx XDMA PCIe interface?

You can use Xillinx XDMA IP but it is not as simple as switching one IP with another. This would require significant amount of work on modifying current LimeSDR-XTRX gateware and LimeSuite software.

Can LitePCIe be configured to use less BRAMs?

Yes, you can reduce BRAM’s used by litePCIe, but it will affect data transfer rates. It depends from your application - if your application does not require high sample rates or does not require continuous data stream you can experiment by reducing DMA buffers in litePCIe here and see if it suits your application needs.

Regards,
Vytautas

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Thanks for all your advice.
It appears reconfiguring litePCIe is the way to go. User applications in FPGA could reduce data rate of PCIe.

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