Tx baseband tune using LMS7002M

I am using the LMS7002EVB for an RF program but there is a little problem with the GUI operation. When I am going to tune the Tx baseband filter in the TBB tab, it always shows that the CSW_VCO_CGEN = 255 error. The bandwidth I type in is in the range. I try to adjust the VCO PARAM in the CLKGEN tab, but it cannot help. I also check the Rx baseband filter and it’s fine. It can be tuned.

@RicardasVadoklis @Zack
Please help me. I have no clue if I am doing something wrong.
Thanks

Hi @gundanfans,

Could you provide this information, please:

  1. LMS7002EVB version;
  2. LimeSuiteGUI version;
  3. Print screen with LimeSuiteGUI bottom status bar visible when connected to the board.

Thank you for reply. I will upload the needed information when I back to my lab as soon as possible

By the way, are you using LMS7002EVB with the Stream board? What is Stream board version if yes?

Hello, Zack. I don’t use the LMS7002EVB with the Stream Board.

The board version is LMS7002 EVB v3 and the LimeSuiteGUI version is 16.3.4.804 shown as figure.1.

After connected to the board, I have printed screen with every tab shown as follow figures.

And the most important one is this

By the way, I am testing the loopback function. Some settings may be related to it.

Thanks
@Zack

Hello @gundanfans,

LimeSuiteGUI you are using is very old. Try the [latest one] for chip revision 7.1.0(http://downloads.myriadrf.org/builds/limesuite/LimeSuiteGUI_MR2_478db355.exe).

Thank you for reply. My LimeSuiteGUI software is downloaded from www.limemicro.com last week. Does it has another source to get the latest software ? If it does, can you tell me.

I subscribe too but never get an email?

The latest LimeSuiteGUI you sent me is work. It has solved my problem. Thanks a lot. But there is something that still confuses me. When I calculate and tune the CLK_H in the CLKGEN tab, it pops up such a warining:

I don’t know what this External Data Rate suppose to mean.

You are using EVB board without Stream board. This is why you get these messages. Software tries to configure FPGA PLLs on the Stream board and throws the messages when it fails.

Thank you, Zack. Your reply have already solve my riddle.