Synchronize two LimeSDR

So this new strategy seems to do the trick. Now my rx events start in the same place, give or take one or two samples, every time!

Changed source files are:
http://www.phas.ubc.ca/~michal/lms7_trx_top2.bdf and
http://www.phas.ubc.ca/~michal/rx_path_top.vhd
The output binary is: http://www.phas.ubc.ca/~michal/capture_timer.rbf

To use it, you need to hold GPIO0 high for at least one full rx buffer, and then watch for rx buffers with the leading bit set. Remove the leading bit and what’s left is the last timestamp before GPIO0 went high. That same number gets transmitted in the timestamp field with every packet until GPIO0 goes low. There is some bit shifting happening in the timer in some circumstances I didn’t fully understand, so it might be safest to check for a bit set in either of the top 2.

@KarlL and @mleech, if you’re using the older version, you might want to give this a try.

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