What you describe is basically right -toggling the GPIO high then low will reset the timestamp counter, and you detect it by seeing that the most recent timestamp is lower than the one before. I think if you see a timestamp of 0 you shouldn’t trust it, because it probably gets held at zero as long as the GPIO is high, so look at the timestamp of the next packet.
I think the only source file that’s changed is the top level bdf. I’ve put mine at http://www.phas.ubc.ca/~michal/lms7_trx_top.bdf, and the binary at: http://www.phas.ubc.ca/~michal/LimeSDR-USB_lms7_trx_HW_1.4.rbf
If you open the .qsf, then browse the .bdf and search for the signal names I mentioned above, it should be easy to spot the or gate I added. The diff of the bdf seems very large, but I’m using a newer version of Quartus and it seems to have moved things around.