Sample rate in LimeSuiteNG for Lime XTRX

Hi,

Thanks for the LimeSuiteNG development for Lime XTRX!

We are testing our board with different sample rates, and get a bit confused with the sampling rate.

In LimeSuiteNG/src/boards/LMS7002M_SDRDevice.cpp:936, the sampling rate range is fixed to be from 100 kHz to 61.44 MHz. But the description of the board is saying it can go up to 120 MHz.

So we are wondering what the proper way to set the sampling rate to be higher than 61.44 MHz is?

Thank you for your help!

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Tagging @VytautasB.

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That is general capabilities description, it’s not imposing a limit. You can set the XTRX sampling rate to 120MHz, but it is supported only in SISO mode.

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Thank you for the answer @ricardas !

If we want to use a high sampling rate, do we need to change other configurations correspondingly?

For example, in the basicTX test, should we change arguments like oversample, samplesInPkt, etc?

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for a sample rate of 122.88 MHz, the oversample should be 1. And most likely the linkFormat should be set to DataFormat::I12.

the linkFormat has to be I12 if XTRX is connected to host using only Gen2 x1 PCIe lane.

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Thanks @ricardas !

Now we can transmit and receive with a high sampling rate, it works well!

@ricardas could you explain more detail please what does its mean: “the linkFormat has to be I12 if XTRX is connected to host using only Gen2 x1 PCIe lane.”.
We connected the XTRX to the host using PCIE X16 with I12 linkFormat and noticed a problem with sampling rates above 61.44: our device doesn’t see the commands in the signal transmitted by the XTRX.

that’s your motherboard’s PCIe port with x16 lanes.
XTRX can use at most only 2 lanes.
Because XTRX has miniPCIe connector and your motherboard has full PCIe port, I assume you are using some kind of adapter board, those adapters usually connect only 1 lane.
That theoretically limits the data rate to 500 MB/s.

SISO: 122.88MHz * 3 bytes (IQ pair I12) = 368.64 MB/s
SISO: 122.88MHz * 4 bytes (IQ pair I16) = 491.52 MB/s // too close to limit, might not be enough

are you using SISO or MIMO?

We are using SISO mode, only Tx channel 0 for transmitting.
And yes, you are absolutely right, we use a cheap adapter from PCIe-mini to PCIe.

Do you use timestamps for Tx packets? It might be a matter of performance, with high sampling rates if the packet is not transferred to the board in time when it should be transmitted, then it is dropped and nothing will be transmitted.
You should check stream status counters to see if there are any problems.

No, @ricardas, we do not use timestamps for Tx packets.
Here are our channel settings before Tx stream starting:

// SDRConfig config;
        config.channel[c].tx.enabled = true;
        config.channel[c].tx.sampleRate = m_config.samplingRate();
        config.channel[c].tx.oversample = 1;
        config.channel[c].tx.lpf = m_config.bandwidth();
        config.channel[c].tx.path = 2; // TODO: replace with string names
        config.channel[c].tx.centerFrequency = m_config.frequency();
        config.channel[c].tx.calibrate = m_config.txGain() > 30 ? (CalibrationFlag::DCIQ | CalibrationFlag::FILTER) : 0;
        config.channel[c].tx.gain[eGainTypes::PAD] = m_config.txGain();

And stream settings:

// StreamConfig stream;
        stream.channels[TRXDir::Rx] = { 0 };
        stream.channels[TRXDir::Tx] = { 0 };
        stream.format = DataFormat::I16;                         // input format
        stream.linkFormat = DataFormat::I12;                     // same format for internal traffic
        stream.statusCallback = &LimeSDRDevice::StaticCallback;  // StatusCallback registration
        stream.userData = this;

// StreamMeta txMeta;
        txMeta.timestamp = 0;
        txMeta.waitForTimestamp = false; // means ignore timestamp
        txMeta.flushPartialPacket = false;

        uint32_t samplesSent = m_device->StreamTx(chipIndex, &samplesPtr, m_config.numSamplesTx(), &txMeta);