I no longer have my Red Pitaya, but one of my favourite applications for it was the multiband WSPR transceiver weitten by Pavel Demin. I was having a look yesterday, and am wondering about the feasibility of porting to LimeSDR.
The project page is here: http://pavel-demin.github.io/red-pitaya-notes/sdr-transceiver-wspr/
From looking at the code & block diagram, it seems that the integration between the FPGA and CPU on the RP is tighter than on the LimeSDR… esp. since the LimeSDR doesn’t really have an onboard CPU.
The basic receive flow is as follows:
For each band…
code sets a register which tuned the receiver
it polls a fifo buffer to create a 42k sample c2 file
The FPGA has a series of decimation and other stuff going on to deliver a 372 sample/s stream for each band into the fifo.
Now you’ve got me curious to know if you could decode other WSJT-X modes at the same time on different bands (with the same radio and computer). I’d imagine you could have multiple filters at various bands that take one I/Q stream from the source and then, after the filter, port it into OOT blocks based off of the code from WSJT. I guess it’d kind of be the same with TX, except simpler if its just a beacon on multiple bands where you’d just have to have one WSPR signal in and then add (maybe not the right word) multiple frequency offsets to go into one sink.
None of this, in my head mind you, would really be on the FPGA, but instead just running in C++ OOT blocks.
@tungstenlightbulb yeah, I think the main point of the FPGA here is to filter down the signal to something that would not take huge processing power to demodulate. Things like decimation would reduce the processor load, while not really altering the meaningful content of the signal.
