PCIe kernel driver does not bind to more than one LimeSDR PCIe board!

Hello,

I have two Limesdr PCIe boards. When I plug it into the motherboard only one of the board gets bound to the Kernel Driver: xillybus_pcie

0b:00.0 Unassigned class [ff00]: Altera Corporation Device ebeb (rev 01)
Subsystem: Altera Corporation Device ebeb
Flags: bus master, fast devsel, latency 0, IRQ 135
Memory at 2fffe00000 (64-bit, prefetchable) [size=128]
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
Capabilities: [78] Power Management version 3
Capabilities: [80] Express Endpoint, MSI 00
Capabilities: [100] Virtual Channel
Kernel driver in use: xillybus_pcie
Kernel modules: xillybus_pcie, altera_cvp

0c:00.0 Unassigned class [ff00]: Altera Corporation Device ebeb (rev 01)
Subsystem: Altera Corporation Device ebeb
Flags: fast devsel, IRQ 16
Memory at 2fffd00000 (64-bit, prefetchable) [size=128]
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
Capabilities: [78] Power Management version 3
Capabilities: [80] Express Endpoint, MSI 00
Capabilities: [100] Virtual Channel
Kernel modules: xillybus_pcie, altera_cvp

Device Info:
driver=PCIEXillybus
hardware=LimeSDR-PCIe
boardSerialNumber=0x0
expansionName=UNKNOWN
firmwareVersion=7
gatewareVersion=2.11
hardwareVersion=3
protocolVersion=1

Can any one tell what the issue could be? Both board are working fine when individually plugged in.

@IgnasJ @andrewback @Zack Please help!

I understand that only a single LimeSDR-PCIe is supported in a system.

Any plans for adding this support? Also if possible can you point out where and what needs to be modified in order to enumerate two PCIe LimeSDR boards? @andrewback

Also how can I change the PCIe device ID from 0xEBEB to 0xEB00. Thanks
@andrewback @IgnasJ @Zack

Not that I’m aware of. The LimeSDR QPCIe was created for applications that need 4x4 MIMO.

Appears to be set in:

Thanks @andrewback. We are looking to implement a 8x8 system using LimeSDR PCIe, any idea of way forward since multiple boards are not supported.

Also can you share a guide on how to update the FPGA code of LimeSDR. Like if I modify the Device ID what are the steps I need to go through. Thanks.

I’m afraid we don’t have guides to modifying the FPGA designs. Will discuss with colleagues and see if we can provide some suggestions.

Hi @farhan296,

You see only one board because endpoint names are the same for different boards. Hence you have to generate Xillybus with different endpoint names for second board, then replace it here:


and here:

The recompile the gateware. Check documnetation for more information: