Dear Lime Team (@andrewback, @zack) ,
we have some trouble configuring the LMS7002M chip via the FPGA in order to receive I/Q data (at any frequency). We can not use the FX3 (SPI interface only) and want to command as well as read the LMS7002M through an external ARM based uC. The uC is connected through the FPGA GPIO Pins and the FPGA Gateware is adpated as explained 2 sections below.
However, we have some trouble with the configuration of the LMS7002M transceiver chip. The short story is that we are trying to configure the LMS with an external micro controller via the FPGA in order to send I/Q data of Port 1 (receive only at any frequency) via SPI to the FPGA’s GPIO Pins. However, although the LMS can be configured it does not send any data. So we are wondering if any other steps are needed to configure the LMS to send RX data to the FPGA? We are guessing that the clock frequency may need to be written into one of the registers, too?
The setup to configure the transceiver is the following:
PC (example.ini) --> FTDI chip / Uart --> external uC --> SPI (via GPIO Pins) --> FPGA --> SPI —> LMS7002M.
The test .ini file from the Forum (example.ini) is utilized: https://wiki.myriadrf.org/LimeSDR-USB_Quick_Test
The PC sends the example.ini via FTDI to the uC, which converts it into the correct data format and then sends it to the FPGA (via LimeSDR GPIOs). The FPGA Gateware has been adopted to forward the data to the LMS transceiver. The registers in the transceiver are than read in order to verify the correct setup. Sometimes there are wrong numbers in the LMS registers… However, the FPGA than reads the DIQ interface and passes this data on to another external SPI interface (utilizing the GPIOs) --> see flow depicted below.
The setup to receive the I/Q data is:
LMS7002M --> DIQ --> FPGA --> SPI (via GPIO Pins)
Is there theoretically anything else needed than just the “example.ini” file in order to make the LMS talk with the FPGA and transmit the I/Q data? (Btw. the Clock generator is working, I programmed it via I2C every time the board powers up and implemented a control LED which indicates that the FPGA works.)
Also the “example.ini” mentions the clock frequency at the very bottom of the file. Unfortunately it does not tell me the register and value for the LMS. I deleted this out of the file, could this be the reason? Is there any register which needs to be filled in order to tell the LMS that the clock frequency is 30.72 MHz?
Thank you very, very much for your help!
Best regards,
Sombrero