I’m trying to add some custom logic into my LimeSDR-USB and need to access a register.
Reading through the RTL I’ve seen that register 24 is spare, and I have successfully used LMS_ReadFPGAReg and LMS_WriteFPGAReg to verify R/W operation here.
My question, is there a register map in documentation where this is laid out ?
Is there a more general access method for accessing any register (in LMS7002M, FPGA, FX3 etc).
Is there any support for self clearing registers ? What about clock domains for the registers ?