LimeSDR PCIe bandwidth and GQRX

Hi,

I’m using a LimeSDR PCIe on Windows. I installed the Pothos package and can run LimeSuite, GQRX, Pothos Flow and other softwares.

On GQRX and Pothos Flow I can easily display 50 or 55MHz bandwidth on the FFT and waterfall. If I try a wider bandwidth, like 60MHz, nothing happens on GQRX. On Pothos Flow I see the following error:

SoapySDR: setSampleRate(Rx 60 MHz, Tx 60 MHz) Failed -- no common clock rate.

Is there a limitation in those softwares?

I haven’t gotten anything interesting in LimeSuite but it must be because I didn’t configured it properly. That piece of software is a bit intimidating.

Right now I’m just trying to view the spectrum of WiFi signals on 2.4GHz.

Thanks for any advice.

Please try to run CubicSDR in 65 MHz mode…
If cubic runs, all is in order… if not your PC or USB3 may not be able to sustain that bandwith
BRG
Djani

edit:
My bad not usb board, but testing with Cubic still can be useful :blush:

So there are far fewer of the PCIe boards and it could be that you have hit a wrinkle which has not been discovered and ironed out just yet. @IgnasJ, any thoughts on this?

I tried on a Lubuntu machine and get similar results: everything works fine at 50 or 55MHz bandwidth, but at 60MHz GQRX crashes. When restarting it, it directly asks to change the settings to avoid another crash.

Is there a way to check whether it may be a hardware issue, a software issue, or just a configuration issue? Would someone have a working configuration file for Lime Suite and Pothos for example that we could test?
Thanks.

I wrote a small program using the Soapy API to check every sample rate, 1MS/s apart, from 1MS/s to 100MS/s.

The working sample rates in MS/s are [1, 56] and [62, 80] (by “working” I mean that SoapySDRDevice_setSampleRate does not complain about the rate).

The 60MS/s rate I tried was unfortunately just in that small [57, 61] interval that does not work.

Testing a bit more, SoapySDRDevice_readStream properly returns samples up to 68MS/s. I tried with 4k to 32k samples at 450MHz and 2450MHz.

The same tests at 69MS/s does not work. It either returns -1 or a small amount of samples (it looks like a multiple of 1020).

GQRX shows similar results: 68MS/s works fine, 69MS/s shows weird spectrum.

It seems like something was fixed as I now can choose sample rates between 57 and 61MS/s, which would previously give me a Failed -- no common clock rate.

I now sometimes get a [WARNING] phase search FAIL when setting the sample rate.
Error
Whenever I get this error, I just can’t receive anything, SoapySDRDevice_readStream always returns -1. So I close the SDR and reconfigure everything again. Sometimes it then works, sometimes it doesn’t.

tagging @IgnasJ and @Zack.

Any news on this subject?
I’ve received my two limesdr (USB versions) and, very weird, with the very same conditions (same custom app using soapy listening at 60MS/s on dual channel, same antenna, same cables, same firmware version on the limesdr), one of my two limes systematically show me the “WARNING: phase search FAIL” message and then packets’ timestamps show discrepancy indicating that I am loosing packets. With the same conditions, the other card never shows the issue and runs fine.

Here are the logs of the two cards (after having set SOAPY_SDR_LOG_LEVEL to DEBUG), the faulty and the working ones: https://we.tl/VR5rcpZc61

Hi @ChrisLM,

What is Gateware version of the boards you are using?

Hi @Zack
I updated them via Limesuite when I received them, and so both have GW 2.12 (for FW:4 HW:4).

Hi @ChrisLM,

The latest GW version is 2.15.

Upgrading PothosSDR from 2018.02.05 to 2018.03.31 in order to get the latest LimeSuite makes two new errors to appear:

  • When calling SoapySDRDevice_make:
    [ERROR] SetPllFrequency: error configuring phase
  • When caling SoapySDRDevice_activateStream:
    [ERROR] Rx calibration: MCU error 5 (Loopback signal weak: not connected/insufficient gain?)

Any idea whether it’s on the Soapy side or the Lime stack one?

Or could I upgrade just the GW without changing soapy and limesuite?

@Zack : even with the 2.15 GW, I still get the “WARNING: phase search FAIL” like before (in addition to the new messages described above).

@Zack, @andrewback,
I upgraded to GW 2.16, but I still have the problems on the very same card. Could I have forgotten to initialize something on it? Or could it be deffective? The other card with the same app show none of these warnings/errors.

Hi @ChrisLM,

Could you save LMS transceiver configuration with LimeSuiteGUI, please.

Hi @Zack,
I’m not so fluent with LimesuiteGUI (I use soapy mostly). Do you mean open limesuite, select the board, click on button Gui->chip and then on Save button ?

If so, here it is (for both cards, the “problem” one and the “ok” one): https://we.tl/zp3TMGhPPv

Hi @ChrisLM,

Correct.
Could you do more tests with not working board, please. Download the latest LimeSuiteGUI (for Win), connect to the board, open configuration file, go to CGEN tab and push Calculate button. The same for SXT and SXR tabs. Paste message log here.

Using limesuite 18.04.0-PothosSDR-2018.04.08-vc14-x64 (using debug log mode), i tried opening the config file previously posted above and got these errors:

[15:55:50] DEBUG: Estimated reference clock 30.6587 MHz
[15:55:50] INFO: Reference clock 30.72 MHz
[15:55:50] INFO: Connected Control port: LimeSDR-USB FW:4 HW:4 Protocol:1 GW:2.16 Ref Clk: 30.72 MHz
[15:56:14] DEBUG: INT 92, FRAC 786432, DIV_OUTCH_CGEN 2
[15:56:14] DEBUG: VCO 2880.00 MHz, RefClk 30.72 MHz
[15:56:14] DEBUG: csw 247; interval [244, 251]
[15:56:14] ERROR: TuneVCO(CGEN) - failed to lock (cmphl!=3)
[15:56:14] ERROR: SetFrequencyCGEN(480 MHz) failed
[15:56:14] DEBUG: M=240, N=24, Fvco=1200.000 MHz
[15:56:15] ERROR: SetPllFrequency: error configuring phase
[15:56:15] DEBUG: M=240, N=24, Fvco=1200.000 MHz
[15:56:15] DEBUG: M=172, N=2, Fvco=1290.000 MHz
[15:56:15] ERROR: SetPllFrequency: error configuring phase
[15:56:15] DEBUG: M=172, N=2, Fvco=1290.000 MHz
[15:56:31] DEBUG: INT 92, FRAC 786432, DIV_OUTCH_CGEN 2
[15:56:31] DEBUG: VCO 2880.00 MHz, RefClk 30.72 MHz
[15:56:31] DEBUG: csw 245; interval [242, 249]
[15:56:31] DEBUG: M=240, N=24, Fvco=1200.000 MHz
[15:56:31] ERROR: SetPllFrequency: error configuring phase
[15:56:31] DEBUG: M=240, N=24, Fvco=1200.000 MHz
[15:56:31] DEBUG: M=172, N=2, Fvco=1290.000 MHz
[15:56:31] ERROR: SetPllFrequency: error configuring phase
[15:56:31] DEBUG: M=172, N=2, Fvco=1290.000 MHz
[15:56:31] INFO: CGEN frequency set to 480.000000 MHz