LimeSDR Mini factory FPGA code issue

Hello Everyone,
I cloned the most recent version of the LimeSDR Mini FPGA gateware from
When I run it in Quartus Prime (Version 20.1.1) I get several timing issues.
Is the design very sensitive to Quartus toolchain versions? Is there a migration instruction from MyriadRF?

Best regards

Try using the same version that was used by the developers : Quartus Prime Version 15.1.2 Lite Edition

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I have tried using Quartus 15.1.2. The timing issues persist.
It is worrying that the “factory” design does not meet FPGA timing to me since I do not know what matters and not.
Can someone help out?

Did you also install the patch “Quartus Prime Software v15.1 Update 2” to bring your patch level (2) and build (193) to be the exact same “15.1.2 Build 193 02/01/2016 SJ Lite Edition”
So that your version exactly matches the version used by the developers ?

It might also be an good idea to hard reset the gateware folder back to being an exact copy of the master branch on github, because accessing them with Quartus Prime (Version 20.1.1) probably modified lots of the files.

Yes, did a fresh clone of the repo. Quartus patched to correct version