LimeSDR: DSP implemented in the FPGA

Projects LimeSDR
1

Hello.

I’m trying to customize the FPGA of LimeSDR in order to also perform DSP, for a very specific scientific project.

My goal is to don’t depend on software such as GNU Radio or Pothos, with the board transmitting an arbitraly shaped RF pulse (between 30-60 MHz) and receiving a signal with the same bandwidth. The FPGA would perform all the DSP, sending the final product to a GUI I’m programing. Therefore, I want to retain its RF functions but increase its capabilities.

My questions are: Is this possible? How can I begin with programming the FPGA? Is the LimeSuite GUI source code acessible to the general public? If so, where?

Thanks in advance,
João

2

Hello,

You can find the Lime Suite sources here:

The FPGA project:

And also the Cypress FX3 firmware:

What you wish to do sounds possible.

1 Like
3

This resource may be useful too I think:
https://wiki.myriadrf.org/LimeSDR-USB

4

I’m going to be doing something similar. My plan is to leave as much of the FPGA architecture alone as possible, and just tap off the sample data spigots at some (as yet undetermined) convenient point.

I expect to leave the USB interface in, and do configuration via the existing API (which will be ignorant of my FPGA changes). I may replace the sample data back to the API with some internal status messages, but that’s not strictly necessary.

I’m also expecting to whack out chunks of the design that I don’t need - for example, the waveform player. That will free up some resources for my stuff (which is minimal).

I’m going to be using the SDR as a closed-loop controller for a process giving me an error signal at around 400 MHz. My original plan was to design a high speed ADC (and use subsampling direct conversion) but the Lime is an inexpensive, practical solution to my problem.

5

Maybe this gonna work even better for you? :slight_smile:

6

I need multiple outputs - I’m controlling acousto-optic modulators to tune a laser. Since an AO can only tune in one direction, I’ll use one up front to downshift by 200 MHz, then a second to upshift by 0-400 MHz. That gives me a 200 MHz tuning range on the laser.

It will be most convenient, I think, to drive both AOs from a two channel system.

2 Likes
7

Excuse me - a 400 MHz tuning range. Not much at a few hundred terahertz.

8

Nice application! Didn’t know AO could be used to tune laser frequency. I guess you could use LimeSDR to drive the amplifier for a Q-switch also :slight_smile:

9

And it would make a very fine lock-in amplifier as well. (I used an Ettus USRP2 for that almost 10 years ago).

When you think about an SDR as a couple of high speed ADCs and DACs with an FPGA you start to realize how many common design problems they can solve. Don’t know why they aren’t more widely used in such applications.

2 Likes
10

With regards to the topic of this discussion, can anyone tell me how much amount of FPGA is being used in LimeSDR?

11

The information you seek has been in the git repositories for a long time. Take note of the Quartus Prime Version “Lite Edition” used for each if you are going to modify the gateware.

LimeSDR-USB_GW:

+----------------------------------------------------------------------------------+
; Fitter Summary                                                                   ;
+------------------------------------+---------------------------------------------+
; Fitter Status                      ; Successful - Thu May 21 11:28:46 2020       ;
; Quartus Prime Version              ; 15.1.2 Build 193 02/01/2016 SJ Lite Edition ;
; Revision Name                      ; LimeSDR-USB_lms7_trx                        ;
; Top-level Entity Name              ; lms7_trx_top                                ;
; Family                             ; Cyclone IV E                                ;
; Device                             ; EP4CE40F23C8                                ;
; Timing Models                      ; Final                                       ;
; Total logic elements               ; 29,220 / 39,600 ( 74 % )                    ;
;     Total combinational functions  ; 23,118 / 39,600 ( 58 % )                    ;
;     Dedicated logic registers      ; 19,666 / 39,600 ( 50 % )                    ;
; Total registers                    ; 19981                                       ;
; Total pins                         ; 224 / 329 ( 68 % )                          ;
; Total virtual pins                 ; 0                                           ;
; Total memory bits                  ; 832,160 / 1,161,216 ( 72 % )                ;
; Embedded Multiplier 9-bit elements ; 0 / 232 ( 0 % )                             ;
; Total PLLs                         ; 4 / 4 ( 100 % )                             ;
+------------------------------------+---------------------------------------------+

LimeSDR-Mini_GW:

+----------------------------------------------------------------------------------+
; Fitter Summary                                                                   ;
+------------------------------------+---------------------------------------------+
; Fitter Status                      ; Successful - Tue May 07 14:11:04 2019       ;
; Quartus Prime Version              ; 15.1.2 Build 193 02/01/2016 SJ Lite Edition ;
; Revision Name                      ; LimeSDR-Mini_lms7_trx                       ;
; Top-level Entity Name              ; lms7_trx_top                                ;
; Family                             ; MAX 10                                      ;
; Device                             ; 10M16SAU169C8G                              ;
; Timing Models                      ; Final                                       ;
; Total logic elements               ; 14,728 / 15,840 ( 93 % )                    ;
;     Total combinational functions  ; 10,436 / 15,840 ( 66 % )                    ;
;     Dedicated logic registers      ; 11,463 / 15,840 ( 72 % )                    ;
; Total registers                    ; 11561                                       ;
; Total pins                         ; 117 / 130 ( 90 % )                          ;
; Total virtual pins                 ; 0                                           ;
; Total memory bits                  ; 477,328 / 562,176 ( 85 % )                  ;
; Embedded Multiplier 9-bit elements ; 0 / 90 ( 0 % )                              ;
; Total PLLs                         ; 1 / 1 ( 100 % )                             ;
; UFM blocks                         ; 1 / 1 ( 100 % )                             ;
; ADC blocks                         ; 0 / 1 ( 0 % )                               ;
+------------------------------------+---------------------------------------------+

LimeNET-Micro_GW:

+----------------------------------------------------------------------------------+
; Fitter Summary                                                                   ;
+------------------------------------+---------------------------------------------+
; Fitter Status                      ; Successful - Tue Sep 10 12:04:34 2019       ;
; Quartus Prime Version              ; 18.0.0 Build 614 04/24/2018 SJ Lite Edition ;
; Revision Name                      ; LimeNET-Micro_lms7_trx                      ;
; Top-level Entity Name              ; lms7_trx_top                                ;
; Family                             ; MAX 10                                      ;
; Device                             ; 10M16SAU169C8G                              ;
; Timing Models                      ; Final                                       ;
; Total logic elements               ; 15,454 / 15,840 ( 98 % )                    ;
;     Total combinational functions  ; 11,459 / 15,840 ( 72 % )                    ;
;     Dedicated logic registers      ; 11,968 / 15,840 ( 76 % )                    ;
; Total registers                    ; 11998                                       ;
; Total pins                         ; 123 / 130 ( 95 % )                          ;
; Total virtual pins                 ; 0                                           ;
; Total memory bits                  ; 477,328 / 562,176 ( 85 % )                  ;
; Embedded Multiplier 9-bit elements ; 0 / 90 ( 0 % )                              ;
; Total PLLs                         ; 1 / 1 ( 100 % )                             ;
; UFM blocks                         ; 1 / 1 ( 100 % )                             ;
; ADC blocks                         ; 0 / 1 ( 0 % )                               ;
+------------------------------------+---------------------------------------------+

Be warned though that the numbers above are only a snapshot in time (right now), they will fluctuate when updates are made, which have happened.

12

Thanks a lot.