Gateware Top-Level schematic (grafic design file - bdf) outdated

Projects LimeSDR
1

Hello,

we are using the LimeSDR USB with a modified gateware. Currently we are on gateware version 2.16 from the master branch and using Quartus environment with the schematic “lms7_trx_top.bdf” as top-level. For the reason that there are many improvements in the gateware during the last months, our plan was to update to the latest version 2.19. But unfortunately the top-level schematic of this version is not up to date and it is not possible to build. With HDL on top it is not a problem and the build process works fine. But we are coming from analog design and it is easier for us to have a schematic on top. For this my question or request, if it possible to update the file “lms7_trx_top.bdf” in the LimeSDR-USB_GW repository (https://github.com/myriadrf/LimeSDR-USB_GW) so that it match to the HDL code.

Thank you very much
sdr_frickler

2

Hi @sdr_frickler,

If you search this forum, you will find complains about top level being schematic one :slight_smile:
We switched to VHDL top level on purpose. It is much convenient to see the changes in git, it allows us to use more convenient VHDL techniques etc. I see your point and agree that visual representation is more readable, but this is what it is. There are no plans to go back to schematic representation of top level, sorry.