FPGA Loopback

I have a LimeSDR-Mini connected to a Raspberry Pi and I am trying to RX on 868MHz and then TX exactly what was received on 2.4GHz. I want to do this at 30.72 MS/s. Therefore I need to modify the FPGA gateware to put the baseband RX samples into the TX buffer. I was wondering if anybody had done this before and would be able to point me in the right direction, or if anybody could think of an easier way to do it? I can’t stream into and back out of the Pi at this sample rate.

Not sure if anyone has done precisely what you wish to do, but @gasparka has modified the LimeSDR Mini gateware to implement FFT acceleration.

Not sure if this may help in your journey to modifying the gateware to support your application.

I think this could be done by just connecting the RX interface to the TX, as soon as they enter the FPGA.
I have not done this myself, it looks easy but i am sure you will run into some interesting troubles :slight_smile:

Hi @mc955,

You can configure LMS7002M transceiver chip to make an internal digital loopback even without sending data to FPGA. This should be the simplest way unless you want to make some signal processing inside of FPGA before sending samples back to Tx.

Hi Zack,

Thats exactly what I want to do, thanks for your help. No signal processing is required in the FPGA. I assume that with the digital loopback enabled no samples will be streamed to the FPGA.

Would you please be able to elaborate slightly on how to configure the LMS7002M to do this?


Hi @mc955,

You can still stream Rx data to FPGA if necessary.


  1. Set TX_MUX register to 2, i.e. 0x002A[9:8] = b10;
  2. Set TXWRCLK_MUX to 2, i.e. 0x002A[5:4] = b10;
  3. Make sure interpolation and decimation ratios are the same in TxTSP and RxTSP modules.
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Great thanks.

In order to ensure the TxTSP and RxTSP modules have the same ratios, is it sufficient to call LMS_SetSampleRate for both the TX and RX with the same sample rate and oversample ratio for each?

Yes, it is sufficient.

OK, solution for transponder validate using @Zack solution. This is a nice solution as it doesn’t require any process from the host neither FPGA.

Something not clear to me : it seems that this looback is done on analog from the diagram (not using ADC/DAC neither TSP).
Of course, using TSP could be very interesting in the loopback (particularly NCO and FIR).
Can you clarify it ? And if TSP is not involved, is there a solution to plug RxTSP to TxTSP ?

Hi @f5oeo,

Nope, loopback is done via TSPs. The chain is as follows:
ADC → RxTSP → LML interface (here loopback happens) → TxTSP → DAC