Hello. Is it possible to run this or something else in our limesdr?
Possibly with some modification and new client side code. But why bother with a measly 50 to 100 Mhash/second when the current generation of ASIC miners can do around 14,000,000 Mhash/second. You risk damaging your LimeSDR board through heat damage, wasting a lot of electricity, with negotiable return on investment.
EDIT: Actually probably not, there may not be enough multipliers and LE’s in the FPGA chips used in either of the LimeSDR boards.
..............................LimeSDR(PCIe).....LimeSDR(USB)..5-year old miner ..............................EP4CGX30CF23C7N...EP4CE40F23C8N.EP4CE115 Logic elements (LEs)..........29440.............39600.........114480 Logic Array Blocks (LABs).....1840..............2475..........7155 Embedded memory (Kbits).......594...............1134..........3888 Embedded 18 × 18 multipliers..66................116...........266
P.S. I had to add a bunch of dots above because the formatting was being destroyed if I did not.
Possible but not worth it.
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