I’ve updated the version of my LimeSuiteNG and now I’m facing the following problem when trying to run “dualRXTX”:
0: LimeSDR XTRX, media=PCIe, addr=/dev/limepcie0, serial=0000000000000000
Current XTRX gateware does not support 64bit DMA addressing. RF data streaming might not work. Please update gateware.
Configuring device ...
lms7002m_set_frequency_sx: Rx LO(930400000 Hz) - cannot deliver frequency
lms7002m_set_tx_lpf: TxLPF bypassed.
lms7002m_set_tx_lpf: TxLPF bypassed.
Sampling rate set(7.680 MHz): CGEN:61.440 MHz, Decim: 2^1, Interp: 2^1
lms7002m_set_frequency_cgen:(61440000 Hz) failed
lms7002m_set_frequency_cgen:(92160000 Hz) failed
lms7002m_set_frequency_cgen:(92160000 Hz) failed
Unable to send control packet
PLL Clock[1] PHCFG_START error, reg:0x0021=0xFFFF, errorBits:0x0008
Unable to send control packet
Unable to send control packet
...
I’m using the XTRX rev5. Unfortunately, I don’t think the gateware for rev5 has been updated.
More details about my device:
limeDevice -f
Found 1 device(s) :
0: LimeSDR XTRX, media=PCIe, addr=/dev/limepcie0, serial=0000000000000000
Current XTRX gateware does not support 64bit DMA addressing. RF data streaming might not work. Please update gateware.
Expansion name : UNSUPPORTED
Firmware version : 1
Gateware version : 1
Gateware revision : 2
Gateware target board : LimeSDR XTRX
Hardware version : 0
Protocol version : 1
Serial number : 0
SPI slave devices :
FPGA
LMS7002M
Memory devices :
FPGA/FLASH
GPS Lock:
GPS - Undefined
Glonass - Undefined
Galileo - Undefined
Beidou - Undefined
Are you using it with PC, or Arm based platform?
I might be able to update the driver to use 32bit addressing on x86, it didn’t seemed to have problems. But on Arm platforms 32bit adressing doesn’t work without system device tree modifications.
Have you tested with XTRX rev 5? Could this be a problem for the gateware of this model?
I noticed that a lot of problems come up after a few LimeSuiteNG updates. Up until commit f6a743fd it seemed to work almost 100% well, but then, at least for rev 5, it started causing problems.
I haven’t tested with XTRX rev 5 lately, mine is currently bricked, I’ll need to get JTAG to restore it, and test it.
Is f6a743fd the first commit when the problems started? What kind of problems?
lms7002m_set_frequency_sx: Rx LO(930400000 Hz) - cannot deliver frequency
This is not related to DMA in any way, LO tuning could fail if power settings might be incorrect. The closest change following that commit that could affet that: xtrx: update lms7002 registers defaults · myriadrf/LimeSuiteNG@f7453fd · GitHub
Sampling rate set(7.680 MHz): CGEN:61.440 MHz, Decim: 2^1, Interp: 2^1
lms7002m_set_frequency_cgen:(61440000 Hz) failed
lms7002m_set_frequency_cgen:(92160000 Hz) failed
lms7002m_set_frequency_cgen:(92160000 Hz) failed
Unable to send control packet
PLL Clock[1] PHCFG_START error, reg:0x0021=0xFFFF, errorBits:0x0008
This is gateware issue, PLL phase search hangs when the frequency is changed from very low to very high, so then software is unable to communicte with the board. It was fixed in the LimeSDR XTRX gateware Fix for PLL configuration hang · myriadrf/LimeSDR-XTRX_GW@1834a1d · GitHub, not sure about the rev 5.
I’ve updated the limepcie driver to first attempt to use just 32bit DMA addresing, so if host system supports it then it will work with the old gatewares that only supported 32bits. The warning about gateware will still be printed.
Well, let me explain:
With commit version xtrx: update RF switches when directly setting antenna path · myriadrf/LimeSuiteNG@f6a743f · GitHub everything happens as expected (just to be clear, I’ve modified the code to perform the calibration):
Devices found :
0: LimeXTRX0, media=PCIe, addr=/dev/LimeXTRX0_control, serial=0000000000000000
Configuring device ...
SetFrequencySXR, (930.400 MHz)INT 139, FRAC 145184, DIV_LOCH 2, EN_DIV2_DIVPROG 1
SetFrequencySXT, (930.400 MHz)INT 139, FRAC 145184, DIV_LOCH 2, EN_DIV2_DIVPROG 1
RxLPF modifying G_PGA_RBB 18 -> 12
RxLPF bypassed
TxLPF bypassed
RxLPF modifying G_PGA_RBB 18 -> 12
RxLPF bypassed
TxLPF bypassed
[...]
Transmission/reception begins
When I update to the latest commit of June 18th (Fix #53 output RF sampling rate along with interface sampling rate · myriadrf/LimeSuiteNG@c4326f2 · GitHub), it starts to present various problems:
Configuring device ...
SetFrequencySXR(930.4 MHz) - cannot deliver frequency
RxLPF bypassed
TxLPF bypassed
RxLPF bypassed
TxLPF bypassed
Sampling rate set(7.680 MHz): CGEN:61.440 MHz, Decim: 2^1, Interp: 2^1
SetFrequencyCGEN failed
SetFrequencyCGEN failed
SetFrequencyCGEN failed
CMD 56 Read timeout
PLL Clock[1] PHCFG_START error, reg:0x0021=0xFFFF, errorBits:0x0008
CMD 55 Read timeout
FPGA SetPllClock: failed to write registers
CMD 56 Read timeout
CMD 55 Read timeout
CMD 21 Read timeout
CMD 55 Read timeout
CMD 55 Read timeout
CMD 56 Read timeout
CMD 56 Read timeout
CMD 56 Read timeout
CMD 56 Read timeout
CMD 55 Read timeout
CMD 55 Read timeout
CMD 55 Read timeout
CMD 55 Read timeout
CMD 55 Read timeout
CMD 55 Read timeout
FPGA SetPllFrequency: find phase, failed to write registers
CMD 55 Read timeout
FPGA SetPllClock: failed to write registers
CMD 55 Read timeout
CMD 55 Read timeout
FPGA SetPllFrequency: find phase, failed to write registers
[...]
Error Loop
[...]
About the commit Fix for PLL configuration hang · myriadrf/LimeSDR-XTRX_GW@1834a1d · GitHub, this is not in the gateware for the rev 5, unfortunately. The last commit is from January 3rd.
Fixed software in a935d96 the XTRX rev5 required different LDO settings.
Unfortunately I can’t do anything about the gateware.
1 Like
Thank you very much!!! This solve my problem and now I can use the last commit.
