Controlling a SP4T from limemini


I’m wanting to implement this paper ( which uses a single Rx channel of an SDR and a SP4T switch for direction finding. I’ve got a limemini sdr. I’m definitely a software/algorithm person though so the following questions may be a bit naïve.

  1. Could an external switch be controlled directly from the GPIO on the limemini SDR using the same Soapy python interface that would work with the GPIO board?

  2. I’m looking at this switch in particular: . I can see it’s got a 9 pin connector for power and control. The power requirement quoted is 2.3 to 3.6V. On the limemini I’m planning to connect it up to pins 9 and 10 (pic below). Is there anything silly I could be missing here like current draw that means it wouldn’t work with the lime mini (the SP4T switch state 0.1mA typ and supply current may reach 3mA at startup)?


The specifications from the SP4T switch for power are as follows:


  1. The switch seems to be programmed by a truth table. I’m rather hoping this means that I just set GPIOs low or high for True or False. Am I reading the limemini spec correctly that GPIO pins high will be 3.3V and the switch will work high up to 5.5V?

  2. How big a job, for somebody who has never programmed an FPGA, would it be to program the GPIO in the FPGA and interleave the data from each antenna on the lime mini before outputting over USB. I don’t need this at the moment but a follow on project would. Plus I’m keen to learn FPGA programming.

Thank you


I guess you’ve probably already tried it yourself. I have a LimeSDR USB, but I would expect the Mini to work well also, and that your points 1, 2 and 3 are correct and that you can use the Mini to control the switch.

For point 4, it might be quite some work, depending on what you want exactly. You can check this comment for something that might help but on the LimeSDR USB. The idea is to synchronize the Lime with another one (or with any other device that can be connected to the GPIO of the board).

I think exactly what you want has actually been implemented, but for the LimeSDR, not the mini . Have a look at: and the published paper:
There, the bit pattern to output on the GPIOs is transmitted in the top 4 bits of the rf output words - only the low 12 bits go to the ADCs. You might check with Adrian Doll about how invasive the FPGA changes were to accomplish this. I doubt it was too bad.