# Wide Bandwidth Signal Acquisition with LimeSDR-PCIe?

**URL:** <https://discourse.myriadrf.org/t/wide-bandwidth-signal-acquisition-with-limesdr-pcie/522>\
**Category:** LimeSDR\
**Created:** [28 October 2016 20:47 UTC](https://discourse.myriadrf.org/t/wide-bandwidth-signal-acquisition-with-limesdr-pcie/522 "2016-10-28T20:47:32Z")\
**Posts on this page:** 1\
**Showing post:** 5

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**Author:** ![mzs](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/mzs/32/2678_2.png) [@mzs](https://discourse.myriadrf.org/u/mzs)\
**Post date:** [30 October 2016 21:42 UTC](https://discourse.myriadrf.org/t/wide-bandwidth-signal-acquisition-with-limesdr-pcie/522/5 "2016-10-30T21:42:06Z")

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My current understanding it that the USB and PCIe have the exact same bandwidth between the PC and the device.

As for whether the LMS7002M chip used in both can acquire 82MHz analog bandwidth, digitise it, demodulated within the board using custom FPGA code, to drop the data rate below the maximum data transfer limit, I would look at [this post](https://discourse.myriadrf.org/t/max-bandwidth-of-dual-rx/307/7?u=mzs).

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